1/**************************************************************************
2 *
3 * Copyright 2008 VMware, Inc.
4 * Copyright 2009-2010 VMware, Inc.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29#ifndef P_SHADER_TOKENS_H
30#define P_SHADER_TOKENS_H
31
32#ifdef __cplusplus
33extern "C" {
34#endif
35
36
37struct tgsi_header
38{
39   unsigned HeaderSize : 8;
40   unsigned BodySize   : 24;
41};
42
43struct tgsi_processor
44{
45   unsigned Processor  : 4;  /* PIPE_SHADER_ */
46   unsigned Padding    : 28;
47};
48
49enum tgsi_token_type {
50   TGSI_TOKEN_TYPE_DECLARATION,
51   TGSI_TOKEN_TYPE_IMMEDIATE,
52   TGSI_TOKEN_TYPE_INSTRUCTION,
53   TGSI_TOKEN_TYPE_PROPERTY,
54};
55
56struct tgsi_token
57{
58   unsigned Type       : 4;  /**< TGSI_TOKEN_TYPE_x */
59   unsigned NrTokens   : 8;  /**< UINT */
60   unsigned Padding    : 20;
61};
62
63enum tgsi_file_type {
64   TGSI_FILE_NULL,
65   TGSI_FILE_CONSTANT,
66   TGSI_FILE_INPUT,
67   TGSI_FILE_OUTPUT,
68   TGSI_FILE_TEMPORARY,
69   TGSI_FILE_SAMPLER,
70   TGSI_FILE_ADDRESS,
71   TGSI_FILE_IMMEDIATE,
72   TGSI_FILE_SYSTEM_VALUE,
73   TGSI_FILE_IMAGE,
74   TGSI_FILE_SAMPLER_VIEW,
75   TGSI_FILE_BUFFER,
76   TGSI_FILE_MEMORY,
77   TGSI_FILE_CONSTBUF,
78   TGSI_FILE_HW_ATOMIC,
79   TGSI_FILE_COUNT,      /**< how many TGSI_FILE_ types */
80};
81
82
83#define TGSI_WRITEMASK_NONE     0x00
84#define TGSI_WRITEMASK_X        0x01
85#define TGSI_WRITEMASK_Y        0x02
86#define TGSI_WRITEMASK_XY       0x03
87#define TGSI_WRITEMASK_Z        0x04
88#define TGSI_WRITEMASK_XZ       0x05
89#define TGSI_WRITEMASK_YZ       0x06
90#define TGSI_WRITEMASK_XYZ      0x07
91#define TGSI_WRITEMASK_W        0x08
92#define TGSI_WRITEMASK_XW       0x09
93#define TGSI_WRITEMASK_YW       0x0A
94#define TGSI_WRITEMASK_XYW      0x0B
95#define TGSI_WRITEMASK_ZW       0x0C
96#define TGSI_WRITEMASK_XZW      0x0D
97#define TGSI_WRITEMASK_YZW      0x0E
98#define TGSI_WRITEMASK_XYZW     0x0F
99
100enum tgsi_interpolate_mode {
101   TGSI_INTERPOLATE_CONSTANT,
102   TGSI_INTERPOLATE_LINEAR,
103   TGSI_INTERPOLATE_PERSPECTIVE,
104   TGSI_INTERPOLATE_COLOR,          /* special color case for smooth/flat */
105   TGSI_INTERPOLATE_COUNT,
106};
107
108enum tgsi_interpolate_loc {
109   TGSI_INTERPOLATE_LOC_CENTER,
110   TGSI_INTERPOLATE_LOC_CENTROID,
111   TGSI_INTERPOLATE_LOC_SAMPLE,
112   TGSI_INTERPOLATE_LOC_COUNT,
113};
114
115#define TGSI_CYLINDRICAL_WRAP_X (1 << 0)
116#define TGSI_CYLINDRICAL_WRAP_Y (1 << 1)
117#define TGSI_CYLINDRICAL_WRAP_Z (1 << 2)
118#define TGSI_CYLINDRICAL_WRAP_W (1 << 3)
119
120enum tgsi_memory_type {
121   TGSI_MEMORY_TYPE_GLOBAL,         /* OpenCL global              */
122   TGSI_MEMORY_TYPE_SHARED,         /* OpenCL local / GLSL shared */
123   TGSI_MEMORY_TYPE_PRIVATE,        /* OpenCL private             */
124   TGSI_MEMORY_TYPE_INPUT,          /* OpenCL kernel input params */
125   TGSI_MEMORY_TYPE_COUNT,
126};
127
128struct tgsi_declaration
129{
130   unsigned Type        : 4;  /**< TGSI_TOKEN_TYPE_DECLARATION */
131   unsigned NrTokens    : 8;  /**< UINT */
132   unsigned File        : 4;  /**< one of TGSI_FILE_x */
133   unsigned UsageMask   : 4;  /**< bitmask of TGSI_WRITEMASK_x flags */
134   unsigned Dimension   : 1;  /**< any extra dimension info? */
135   unsigned Semantic    : 1;  /**< BOOL, any semantic info? */
136   unsigned Interpolate : 1;  /**< any interpolation info? */
137   unsigned Invariant   : 1;  /**< invariant optimization? */
138   unsigned Local       : 1;  /**< optimize as subroutine local variable? */
139   unsigned Array       : 1;  /**< extra array info? */
140   unsigned Atomic      : 1;  /**< atomic only? for TGSI_FILE_BUFFER */
141   unsigned MemType     : 2;  /**< TGSI_MEMORY_TYPE_x for TGSI_FILE_MEMORY */
142   unsigned Padding     : 3;
143};
144
145struct tgsi_declaration_range
146{
147   unsigned First   : 16; /**< UINT */
148   unsigned Last    : 16; /**< UINT */
149};
150
151struct tgsi_declaration_dimension
152{
153   unsigned Index2D:16; /**< UINT */
154   unsigned Padding:16;
155};
156
157struct tgsi_declaration_interp
158{
159   unsigned Interpolate : 4;   /**< one of TGSI_INTERPOLATE_x */
160   unsigned Location    : 2;   /**< one of TGSI_INTERPOLATE_LOC_x */
161   unsigned CylindricalWrap:4; /**< TGSI_CYLINDRICAL_WRAP_x flags */
162   unsigned Padding     : 22;
163};
164
165enum tgsi_semantic {
166   TGSI_SEMANTIC_POSITION,
167   TGSI_SEMANTIC_COLOR,
168   TGSI_SEMANTIC_BCOLOR,       /**< back-face color */
169   TGSI_SEMANTIC_FOG,
170   TGSI_SEMANTIC_PSIZE,
171   TGSI_SEMANTIC_GENERIC,
172   TGSI_SEMANTIC_NORMAL,
173   TGSI_SEMANTIC_FACE,
174   TGSI_SEMANTIC_EDGEFLAG,
175   TGSI_SEMANTIC_PRIMID,
176   TGSI_SEMANTIC_INSTANCEID,  /**< doesn't include start_instance */
177   TGSI_SEMANTIC_VERTEXID,
178   TGSI_SEMANTIC_STENCIL,
179   TGSI_SEMANTIC_CLIPDIST,
180   TGSI_SEMANTIC_CLIPVERTEX,
181   TGSI_SEMANTIC_GRID_SIZE,   /**< grid size in blocks */
182   TGSI_SEMANTIC_BLOCK_ID,    /**< id of the current block */
183   TGSI_SEMANTIC_BLOCK_SIZE,  /**< block size in threads */
184   TGSI_SEMANTIC_THREAD_ID,   /**< block-relative id of the current thread */
185   TGSI_SEMANTIC_TEXCOORD,    /**< texture or sprite coordinates */
186   TGSI_SEMANTIC_PCOORD,      /**< point sprite coordinate */
187   TGSI_SEMANTIC_VIEWPORT_INDEX,  /**< viewport index */
188   TGSI_SEMANTIC_LAYER,       /**< layer (rendertarget index) */
189   TGSI_SEMANTIC_SAMPLEID,
190   TGSI_SEMANTIC_SAMPLEPOS,
191   TGSI_SEMANTIC_SAMPLEMASK,
192   TGSI_SEMANTIC_INVOCATIONID,
193   TGSI_SEMANTIC_VERTEXID_NOBASE,
194   TGSI_SEMANTIC_BASEVERTEX,
195   TGSI_SEMANTIC_PATCH,       /**< generic per-patch semantic */
196   TGSI_SEMANTIC_TESSCOORD,   /**< coordinate being processed by tess */
197   TGSI_SEMANTIC_TESSOUTER,   /**< outer tessellation levels */
198   TGSI_SEMANTIC_TESSINNER,   /**< inner tessellation levels */
199   TGSI_SEMANTIC_VERTICESIN,  /**< number of input vertices */
200   TGSI_SEMANTIC_HELPER_INVOCATION,  /**< current invocation is helper */
201   TGSI_SEMANTIC_BASEINSTANCE,
202   TGSI_SEMANTIC_DRAWID,
203   TGSI_SEMANTIC_WORK_DIM,    /**< opencl get_work_dim value */
204   TGSI_SEMANTIC_SUBGROUP_SIZE,
205   TGSI_SEMANTIC_SUBGROUP_INVOCATION,
206   TGSI_SEMANTIC_SUBGROUP_EQ_MASK,
207   TGSI_SEMANTIC_SUBGROUP_GE_MASK,
208   TGSI_SEMANTIC_SUBGROUP_GT_MASK,
209   TGSI_SEMANTIC_SUBGROUP_LE_MASK,
210   TGSI_SEMANTIC_SUBGROUP_LT_MASK,
211   TGSI_SEMANTIC_COUNT,       /**< number of semantic values */
212};
213
214struct tgsi_declaration_semantic
215{
216   unsigned Name           : 8;  /**< one of TGSI_SEMANTIC_x */
217   unsigned Index          : 16; /**< UINT */
218   unsigned StreamX        : 2; /**< vertex stream (for GS output) */
219   unsigned StreamY        : 2;
220   unsigned StreamZ        : 2;
221   unsigned StreamW        : 2;
222};
223
224struct tgsi_declaration_image {
225   unsigned Resource    : 8; /**< one of TGSI_TEXTURE_ */
226   unsigned Raw         : 1;
227   unsigned Writable    : 1;
228   unsigned Format      : 10; /**< one of PIPE_FORMAT_ */
229   unsigned Padding     : 12;
230};
231
232enum tgsi_return_type {
233   TGSI_RETURN_TYPE_UNORM = 0,
234   TGSI_RETURN_TYPE_SNORM,
235   TGSI_RETURN_TYPE_SINT,
236   TGSI_RETURN_TYPE_UINT,
237   TGSI_RETURN_TYPE_FLOAT,
238   TGSI_RETURN_TYPE_UNKNOWN,
239   TGSI_RETURN_TYPE_COUNT
240};
241
242struct tgsi_declaration_sampler_view {
243   unsigned Resource    : 8; /**< one of TGSI_TEXTURE_ */
244   unsigned ReturnTypeX : 6; /**< one of enum tgsi_return_type */
245   unsigned ReturnTypeY : 6; /**< one of enum tgsi_return_type */
246   unsigned ReturnTypeZ : 6; /**< one of enum tgsi_return_type */
247   unsigned ReturnTypeW : 6; /**< one of enum tgsi_return_type */
248};
249
250struct tgsi_declaration_array {
251   unsigned ArrayID : 10;
252   unsigned Padding : 22;
253};
254
255enum tgsi_imm_type {
256   TGSI_IMM_FLOAT32,
257   TGSI_IMM_UINT32,
258   TGSI_IMM_INT32,
259   TGSI_IMM_FLOAT64,
260   TGSI_IMM_UINT64,
261   TGSI_IMM_INT64,
262};
263
264struct tgsi_immediate
265{
266   unsigned Type       : 4;  /**< TGSI_TOKEN_TYPE_IMMEDIATE */
267   unsigned NrTokens   : 14; /**< UINT */
268   unsigned DataType   : 4;  /**< one of TGSI_IMM_x */
269   unsigned Padding    : 10;
270};
271
272union tgsi_immediate_data
273{
274   float Float;
275   unsigned Uint;
276   int Int;
277};
278
279enum tgsi_property_name {
280   TGSI_PROPERTY_GS_INPUT_PRIM,
281   TGSI_PROPERTY_GS_OUTPUT_PRIM,
282   TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES,
283   TGSI_PROPERTY_FS_COORD_ORIGIN,
284   TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
285   TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS,
286   TGSI_PROPERTY_FS_DEPTH_LAYOUT,
287   TGSI_PROPERTY_VS_PROHIBIT_UCPS,
288   TGSI_PROPERTY_GS_INVOCATIONS,
289   TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION,
290   TGSI_PROPERTY_TCS_VERTICES_OUT,
291   TGSI_PROPERTY_TES_PRIM_MODE,
292   TGSI_PROPERTY_TES_SPACING,
293   TGSI_PROPERTY_TES_VERTEX_ORDER_CW,
294   TGSI_PROPERTY_TES_POINT_MODE,
295   TGSI_PROPERTY_NUM_CLIPDIST_ENABLED,
296   TGSI_PROPERTY_NUM_CULLDIST_ENABLED,
297   TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL,
298   TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE,
299   TGSI_PROPERTY_NEXT_SHADER,
300   TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH,
301   TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT,
302   TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH,
303   TGSI_PROPERTY_MUL_ZERO_WINS,
304   TGSI_PROPERTY_COUNT,
305};
306
307struct tgsi_property {
308   unsigned Type         : 4;  /**< TGSI_TOKEN_TYPE_PROPERTY */
309   unsigned NrTokens     : 8;  /**< UINT */
310   unsigned PropertyName : 8;  /**< one of TGSI_PROPERTY */
311   unsigned Padding      : 12;
312};
313
314enum tgsi_fs_coord_origin {
315   TGSI_FS_COORD_ORIGIN_UPPER_LEFT,
316   TGSI_FS_COORD_ORIGIN_LOWER_LEFT,
317};
318
319enum tgsi_fs_coord_pixcenter {
320   TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER,
321   TGSI_FS_COORD_PIXEL_CENTER_INTEGER,
322};
323
324enum tgsi_fs_depth_layout {
325   TGSI_FS_DEPTH_LAYOUT_NONE,
326   TGSI_FS_DEPTH_LAYOUT_ANY,
327   TGSI_FS_DEPTH_LAYOUT_GREATER,
328   TGSI_FS_DEPTH_LAYOUT_LESS,
329   TGSI_FS_DEPTH_LAYOUT_UNCHANGED,
330};
331
332struct tgsi_property_data {
333   unsigned Data;
334};
335
336/* TGSI opcodes.
337 *
338 * For more information on semantics of opcodes and
339 * which APIs are known to use which opcodes, see
340 * gallium/docs/source/tgsi.rst
341 */
342enum tgsi_opcode {
343   TGSI_OPCODE_ARL                = 0,
344   TGSI_OPCODE_MOV                = 1,
345   TGSI_OPCODE_LIT                = 2,
346   TGSI_OPCODE_RCP                = 3,
347   TGSI_OPCODE_RSQ                = 4,
348   TGSI_OPCODE_EXP                = 5,
349   TGSI_OPCODE_LOG                = 6,
350   TGSI_OPCODE_MUL                = 7,
351   TGSI_OPCODE_ADD                = 8,
352   TGSI_OPCODE_DP3                = 9,
353   TGSI_OPCODE_DP4                = 10,
354   TGSI_OPCODE_DST                = 11,
355   TGSI_OPCODE_MIN                = 12,
356   TGSI_OPCODE_MAX                = 13,
357   TGSI_OPCODE_SLT                = 14,
358   TGSI_OPCODE_SGE                = 15,
359   TGSI_OPCODE_MAD                = 16,
360   TGSI_OPCODE_TEX_LZ             = 17,
361   TGSI_OPCODE_LRP                = 18,
362   TGSI_OPCODE_FMA                = 19,
363   TGSI_OPCODE_SQRT               = 20,
364   TGSI_OPCODE_LDEXP              = 21,
365   TGSI_OPCODE_F2U64              = 22,
366   TGSI_OPCODE_F2I64              = 23,
367   TGSI_OPCODE_FRC                = 24,
368   TGSI_OPCODE_TXF_LZ             = 25,
369   TGSI_OPCODE_FLR                = 26,
370   TGSI_OPCODE_ROUND              = 27,
371   TGSI_OPCODE_EX2                = 28,
372   TGSI_OPCODE_LG2                = 29,
373   TGSI_OPCODE_POW                = 30,
374   /* gap */
375   TGSI_OPCODE_U2I64              = 32,
376   TGSI_OPCODE_CLOCK              = 33,
377   TGSI_OPCODE_I2I64              = 34,
378   /* gap */
379   TGSI_OPCODE_COS                = 36,
380   TGSI_OPCODE_DDX                = 37,
381   TGSI_OPCODE_DDY                = 38,
382   TGSI_OPCODE_KILL               = 39 /* unconditional */,
383   TGSI_OPCODE_PK2H               = 40,
384   TGSI_OPCODE_PK2US              = 41,
385   TGSI_OPCODE_PK4B               = 42,
386   TGSI_OPCODE_PK4UB              = 43,
387   TGSI_OPCODE_D2U64              = 44,
388   TGSI_OPCODE_SEQ                = 45,
389   TGSI_OPCODE_D2I64              = 46,
390   TGSI_OPCODE_SGT                = 47,
391   TGSI_OPCODE_SIN                = 48,
392   TGSI_OPCODE_SLE                = 49,
393   TGSI_OPCODE_SNE                = 50,
394   TGSI_OPCODE_U642D              = 51,
395   TGSI_OPCODE_TEX                = 52,
396   TGSI_OPCODE_TXD                = 53,
397   TGSI_OPCODE_TXP                = 54,
398   TGSI_OPCODE_UP2H               = 55,
399   TGSI_OPCODE_UP2US              = 56,
400   TGSI_OPCODE_UP4B               = 57,
401   TGSI_OPCODE_UP4UB              = 58,
402   TGSI_OPCODE_U642F              = 59,
403   TGSI_OPCODE_I642F              = 60,
404   TGSI_OPCODE_ARR                = 61,
405   TGSI_OPCODE_I642D              = 62,
406   TGSI_OPCODE_CAL                = 63,
407   TGSI_OPCODE_RET                = 64,
408   TGSI_OPCODE_SSG                = 65 /* SGN */,
409   TGSI_OPCODE_CMP                = 66,
410   /* gap */
411   TGSI_OPCODE_TXB                = 68,
412   TGSI_OPCODE_FBFETCH            = 69,
413   TGSI_OPCODE_DIV                = 70,
414   TGSI_OPCODE_DP2                = 71,
415   TGSI_OPCODE_TXL                = 72,
416   TGSI_OPCODE_BRK                = 73,
417   TGSI_OPCODE_IF                 = 74,
418   TGSI_OPCODE_UIF                = 75,
419   TGSI_OPCODE_READ_INVOC         = 76,
420   TGSI_OPCODE_ELSE               = 77,
421   TGSI_OPCODE_ENDIF              = 78,
422   TGSI_OPCODE_DDX_FINE           = 79,
423   TGSI_OPCODE_DDY_FINE           = 80,
424   /* gap */
425   TGSI_OPCODE_CEIL               = 83,
426   TGSI_OPCODE_I2F                = 84,
427   TGSI_OPCODE_NOT                = 85,
428   TGSI_OPCODE_TRUNC              = 86,
429   TGSI_OPCODE_SHL                = 87,
430   TGSI_OPCODE_BALLOT             = 88,
431   TGSI_OPCODE_AND                = 89,
432   TGSI_OPCODE_OR                 = 90,
433   TGSI_OPCODE_MOD                = 91,
434   TGSI_OPCODE_XOR                = 92,
435   /* gap */
436   TGSI_OPCODE_TXF                = 94,
437   TGSI_OPCODE_TXQ                = 95,
438   TGSI_OPCODE_CONT               = 96,
439   TGSI_OPCODE_EMIT               = 97,
440   TGSI_OPCODE_ENDPRIM            = 98,
441   TGSI_OPCODE_BGNLOOP            = 99,
442   TGSI_OPCODE_BGNSUB             = 100,
443   TGSI_OPCODE_ENDLOOP            = 101,
444   TGSI_OPCODE_ENDSUB             = 102,
445   TGSI_OPCODE_ATOMFADD           = 103,
446   TGSI_OPCODE_TXQS               = 104,
447   TGSI_OPCODE_RESQ               = 105,
448   TGSI_OPCODE_READ_FIRST         = 106,
449   TGSI_OPCODE_NOP                = 107,
450
451   TGSI_OPCODE_FSEQ               = 108,
452   TGSI_OPCODE_FSGE               = 109,
453   TGSI_OPCODE_FSLT               = 110,
454   TGSI_OPCODE_FSNE               = 111,
455
456   TGSI_OPCODE_MEMBAR             = 112,
457                                /* gap */
458   TGSI_OPCODE_KILL_IF            = 116  /* conditional kill */,
459   TGSI_OPCODE_END                = 117  /* aka HALT */,
460   TGSI_OPCODE_DFMA               = 118,
461   TGSI_OPCODE_F2I                = 119,
462   TGSI_OPCODE_IDIV               = 120,
463   TGSI_OPCODE_IMAX               = 121,
464   TGSI_OPCODE_IMIN               = 122,
465   TGSI_OPCODE_INEG               = 123,
466   TGSI_OPCODE_ISGE               = 124,
467   TGSI_OPCODE_ISHR               = 125,
468   TGSI_OPCODE_ISLT               = 126,
469   TGSI_OPCODE_F2U                = 127,
470   TGSI_OPCODE_U2F                = 128,
471   TGSI_OPCODE_UADD               = 129,
472   TGSI_OPCODE_UDIV               = 130,
473   TGSI_OPCODE_UMAD               = 131,
474   TGSI_OPCODE_UMAX               = 132,
475   TGSI_OPCODE_UMIN               = 133,
476   TGSI_OPCODE_UMOD               = 134,
477   TGSI_OPCODE_UMUL               = 135,
478   TGSI_OPCODE_USEQ               = 136,
479   TGSI_OPCODE_USGE               = 137,
480   TGSI_OPCODE_USHR               = 138,
481   TGSI_OPCODE_USLT               = 139,
482   TGSI_OPCODE_USNE               = 140,
483   TGSI_OPCODE_SWITCH             = 141,
484   TGSI_OPCODE_CASE               = 142,
485   TGSI_OPCODE_DEFAULT            = 143,
486   TGSI_OPCODE_ENDSWITCH          = 144,
487
488   /* resource related opcodes */
489   TGSI_OPCODE_SAMPLE             = 145,
490   TGSI_OPCODE_SAMPLE_I           = 146,
491   TGSI_OPCODE_SAMPLE_I_MS        = 147,
492   TGSI_OPCODE_SAMPLE_B           = 148,
493   TGSI_OPCODE_SAMPLE_C           = 149,
494   TGSI_OPCODE_SAMPLE_C_LZ        = 150,
495   TGSI_OPCODE_SAMPLE_D           = 151,
496   TGSI_OPCODE_SAMPLE_L           = 152,
497   TGSI_OPCODE_GATHER4            = 153,
498   TGSI_OPCODE_SVIEWINFO          = 154,
499   TGSI_OPCODE_SAMPLE_POS         = 155,
500   TGSI_OPCODE_SAMPLE_INFO        = 156,
501
502   TGSI_OPCODE_UARL               = 157,
503   TGSI_OPCODE_UCMP               = 158,
504   TGSI_OPCODE_IABS               = 159,
505   TGSI_OPCODE_ISSG               = 160,
506
507   TGSI_OPCODE_LOAD               = 161,
508   TGSI_OPCODE_STORE              = 162,
509   TGSI_OPCODE_IMG2HND            = 163,
510   TGSI_OPCODE_SAMP2HND           = 164,
511   /* gap */
512   TGSI_OPCODE_BARRIER            = 166,
513
514   TGSI_OPCODE_ATOMUADD           = 167,
515   TGSI_OPCODE_ATOMXCHG           = 168,
516   TGSI_OPCODE_ATOMCAS            = 169,
517   TGSI_OPCODE_ATOMAND            = 170,
518   TGSI_OPCODE_ATOMOR             = 171,
519   TGSI_OPCODE_ATOMXOR            = 172,
520   TGSI_OPCODE_ATOMUMIN           = 173,
521   TGSI_OPCODE_ATOMUMAX           = 174,
522   TGSI_OPCODE_ATOMIMIN           = 175,
523   TGSI_OPCODE_ATOMIMAX           = 176,
524
525   /* to be used for shadow cube map compares */
526   TGSI_OPCODE_TEX2               = 177,
527   TGSI_OPCODE_TXB2               = 178,
528   TGSI_OPCODE_TXL2               = 179,
529
530   TGSI_OPCODE_IMUL_HI            = 180,
531   TGSI_OPCODE_UMUL_HI            = 181,
532
533   TGSI_OPCODE_TG4                = 182,
534
535   TGSI_OPCODE_LODQ               = 183,
536
537   TGSI_OPCODE_IBFE               = 184,
538   TGSI_OPCODE_UBFE               = 185,
539   TGSI_OPCODE_BFI                = 186,
540   TGSI_OPCODE_BREV               = 187,
541   TGSI_OPCODE_POPC               = 188,
542   TGSI_OPCODE_LSB                = 189,
543   TGSI_OPCODE_IMSB               = 190,
544   TGSI_OPCODE_UMSB               = 191,
545
546   TGSI_OPCODE_INTERP_CENTROID    = 192,
547   TGSI_OPCODE_INTERP_SAMPLE      = 193,
548   TGSI_OPCODE_INTERP_OFFSET      = 194,
549
550   /* sm5 marked opcodes are supported in D3D11 optionally - also DMOV, DMOVC */
551   TGSI_OPCODE_F2D                = 195 /* SM5 */,
552   TGSI_OPCODE_D2F                = 196,
553   TGSI_OPCODE_DABS               = 197,
554   TGSI_OPCODE_DNEG               = 198 /* SM5 */,
555   TGSI_OPCODE_DADD               = 199 /* SM5 */,
556   TGSI_OPCODE_DMUL               = 200 /* SM5 */,
557   TGSI_OPCODE_DMAX               = 201 /* SM5 */,
558   TGSI_OPCODE_DMIN               = 202 /* SM5 */,
559   TGSI_OPCODE_DSLT               = 203 /* SM5 */,
560   TGSI_OPCODE_DSGE               = 204 /* SM5 */,
561   TGSI_OPCODE_DSEQ               = 205 /* SM5 */,
562   TGSI_OPCODE_DSNE               = 206 /* SM5 */,
563   TGSI_OPCODE_DRCP               = 207 /* eg, cayman */,
564   TGSI_OPCODE_DSQRT              = 208 /* eg, cayman also has DRSQ */,
565   TGSI_OPCODE_DMAD               = 209,
566   TGSI_OPCODE_DFRAC              = 210 /* eg, cayman */,
567   TGSI_OPCODE_DLDEXP             = 211 /* eg, cayman */,
568   TGSI_OPCODE_DFRACEXP           = 212 /* eg, cayman */,
569   TGSI_OPCODE_D2I                = 213,
570   TGSI_OPCODE_I2D                = 214,
571   TGSI_OPCODE_D2U                = 215,
572   TGSI_OPCODE_U2D                = 216,
573   TGSI_OPCODE_DRSQ               = 217 /* eg, cayman also has DRSQ */,
574   TGSI_OPCODE_DTRUNC             = 218 /* nvc0 */,
575   TGSI_OPCODE_DCEIL              = 219 /* nvc0 */,
576   TGSI_OPCODE_DFLR               = 220 /* nvc0 */,
577   TGSI_OPCODE_DROUND             = 221 /* nvc0 */,
578   TGSI_OPCODE_DSSG               = 222,
579
580   TGSI_OPCODE_VOTE_ANY           = 223,
581   TGSI_OPCODE_VOTE_ALL           = 224,
582   TGSI_OPCODE_VOTE_EQ            = 225,
583
584   TGSI_OPCODE_U64SEQ             = 226,
585   TGSI_OPCODE_U64SNE             = 227,
586   TGSI_OPCODE_I64SLT             = 228,
587   TGSI_OPCODE_U64SLT             = 229,
588   TGSI_OPCODE_I64SGE             = 230,
589   TGSI_OPCODE_U64SGE             = 231,
590
591   TGSI_OPCODE_I64MIN             = 232,
592   TGSI_OPCODE_U64MIN             = 233,
593   TGSI_OPCODE_I64MAX             = 234,
594   TGSI_OPCODE_U64MAX             = 235,
595
596   TGSI_OPCODE_I64ABS             = 236,
597   TGSI_OPCODE_I64SSG             = 237,
598   TGSI_OPCODE_I64NEG             = 238,
599
600   TGSI_OPCODE_U64ADD             = 239,
601   TGSI_OPCODE_U64MUL             = 240,
602   TGSI_OPCODE_U64SHL             = 241,
603   TGSI_OPCODE_I64SHR             = 242,
604   TGSI_OPCODE_U64SHR             = 243,
605
606   TGSI_OPCODE_I64DIV             = 244,
607   TGSI_OPCODE_U64DIV             = 245,
608   TGSI_OPCODE_I64MOD             = 246,
609   TGSI_OPCODE_U64MOD             = 247,
610
611   TGSI_OPCODE_DDIV               = 248,
612
613   TGSI_OPCODE_LOD                = 249,
614
615   TGSI_OPCODE_LAST               = 250,
616};
617
618
619/**
620 * Opcode is the operation code to execute. A given operation defines the
621 * semantics how the source registers (if any) are interpreted and what is
622 * written to the destination registers (if any) as a result of execution.
623 *
624 * NumDstRegs and NumSrcRegs is the number of destination and source registers,
625 * respectively. For a given operation code, those numbers are fixed and are
626 * present here only for convenience.
627 *
628 * Saturate controls how are final results in destination registers modified.
629 */
630
631struct tgsi_instruction
632{
633   unsigned Type       : 4;  /* TGSI_TOKEN_TYPE_INSTRUCTION */
634   unsigned NrTokens   : 8;  /* UINT */
635   unsigned Opcode     : 8;  /* TGSI_OPCODE_ */
636   unsigned Saturate   : 1;  /* BOOL */
637   unsigned NumDstRegs : 2;  /* UINT */
638   unsigned NumSrcRegs : 4;  /* UINT */
639   unsigned Label      : 1;
640   unsigned Texture    : 1;
641   unsigned Memory     : 1;
642   unsigned Precise    : 1;
643   unsigned Padding    : 1;
644};
645
646/*
647 * If tgsi_instruction::Label is TRUE, tgsi_instruction_label follows.
648 *
649 * If tgsi_instruction::Texture is TRUE, tgsi_instruction_texture follows.
650 *   if texture instruction has a number of offsets,
651 *   then tgsi_instruction::Texture::NumOffset of tgsi_texture_offset follow.
652 *
653 * Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow.
654 *
655 * Then, tgsi_instruction::NumSrcRegs of tgsi_src_register follow.
656 *
657 * tgsi_instruction::NrTokens contains the total number of words that make the
658 * instruction, including the instruction word.
659 */
660
661enum tgsi_swizzle {
662   TGSI_SWIZZLE_X,
663   TGSI_SWIZZLE_Y,
664   TGSI_SWIZZLE_Z,
665   TGSI_SWIZZLE_W,
666};
667
668struct tgsi_instruction_label
669{
670   unsigned Label    : 24;   /* UINT */
671   unsigned Padding  : 8;
672};
673
674enum tgsi_texture_type {
675   TGSI_TEXTURE_BUFFER,
676   TGSI_TEXTURE_1D,
677   TGSI_TEXTURE_2D,
678   TGSI_TEXTURE_3D,
679   TGSI_TEXTURE_CUBE,
680   TGSI_TEXTURE_RECT,
681   TGSI_TEXTURE_SHADOW1D,
682   TGSI_TEXTURE_SHADOW2D,
683   TGSI_TEXTURE_SHADOWRECT,
684   TGSI_TEXTURE_1D_ARRAY,
685   TGSI_TEXTURE_2D_ARRAY,
686   TGSI_TEXTURE_SHADOW1D_ARRAY,
687   TGSI_TEXTURE_SHADOW2D_ARRAY,
688   TGSI_TEXTURE_SHADOWCUBE,
689   TGSI_TEXTURE_2D_MSAA,
690   TGSI_TEXTURE_2D_ARRAY_MSAA,
691   TGSI_TEXTURE_CUBE_ARRAY,
692   TGSI_TEXTURE_SHADOWCUBE_ARRAY,
693   TGSI_TEXTURE_UNKNOWN,
694   TGSI_TEXTURE_COUNT,
695};
696
697struct tgsi_instruction_texture
698{
699   unsigned Texture  : 8;    /* TGSI_TEXTURE_ */
700   unsigned NumOffsets : 4;
701   unsigned ReturnType : 3; /* TGSI_RETURN_TYPE_x */
702   unsigned Padding : 17;
703};
704
705/* for texture offsets in GLSL and DirectX.
706 * Generally these always come from TGSI_FILE_IMMEDIATE,
707 * however DX11 appears to have the capability to do
708 * non-constant texture offsets.
709 */
710struct tgsi_texture_offset
711{
712   int      Index    : 16;
713   unsigned File     : 4;  /**< one of TGSI_FILE_x */
714   unsigned SwizzleX : 2;  /* TGSI_SWIZZLE_x */
715   unsigned SwizzleY : 2;  /* TGSI_SWIZZLE_x */
716   unsigned SwizzleZ : 2;  /* TGSI_SWIZZLE_x */
717   unsigned Padding  : 6;
718};
719
720/**
721 * File specifies the register array to access.
722 *
723 * Index specifies the element number of a register in the register file.
724 *
725 * If Indirect is TRUE, Index should be offset by the X component of the indirect
726 * register that follows. The register can be now fetched into local storage
727 * for further processing.
728 *
729 * If Negate is TRUE, all components of the fetched register are negated.
730 *
731 * The fetched register components are swizzled according to SwizzleX, SwizzleY,
732 * SwizzleZ and SwizzleW.
733 *
734 */
735
736struct tgsi_src_register
737{
738   unsigned File        : 4;  /* TGSI_FILE_ */
739   unsigned Indirect    : 1;  /* BOOL */
740   unsigned Dimension   : 1;  /* BOOL */
741   int      Index       : 16; /* SINT */
742   unsigned SwizzleX    : 2;  /* TGSI_SWIZZLE_ */
743   unsigned SwizzleY    : 2;  /* TGSI_SWIZZLE_ */
744   unsigned SwizzleZ    : 2;  /* TGSI_SWIZZLE_ */
745   unsigned SwizzleW    : 2;  /* TGSI_SWIZZLE_ */
746   unsigned Absolute    : 1;    /* BOOL */
747   unsigned Negate      : 1;    /* BOOL */
748};
749
750/**
751 * If tgsi_src_register::Indirect is TRUE, tgsi_ind_register follows.
752 *
753 * File, Index and Swizzle are handled the same as in tgsi_src_register.
754 *
755 * If ArrayID is zero the whole register file might be indirectly addressed,
756 * if not only the Declaration with this ArrayID is accessed by this operand.
757 *
758 */
759
760struct tgsi_ind_register
761{
762   unsigned File    : 4;  /* TGSI_FILE_ */
763   int      Index   : 16; /* SINT */
764   unsigned Swizzle : 2;  /* TGSI_SWIZZLE_ */
765   unsigned ArrayID : 10; /* UINT */
766};
767
768/**
769 * If tgsi_src_register::Dimension is TRUE, tgsi_dimension follows.
770 */
771
772struct tgsi_dimension
773{
774   unsigned Indirect    : 1;  /* BOOL */
775   unsigned Dimension   : 1;  /* BOOL */
776   unsigned Padding     : 14;
777   int      Index       : 16; /* SINT */
778};
779
780struct tgsi_dst_register
781{
782   unsigned File        : 4;  /* TGSI_FILE_ */
783   unsigned WriteMask   : 4;  /* TGSI_WRITEMASK_ */
784   unsigned Indirect    : 1;  /* BOOL */
785   unsigned Dimension   : 1;  /* BOOL */
786   int      Index       : 16; /* SINT */
787   unsigned Padding     : 6;
788};
789
790#define TGSI_MEMORY_COHERENT (1 << 0)
791#define TGSI_MEMORY_RESTRICT (1 << 1)
792#define TGSI_MEMORY_VOLATILE (1 << 2)
793/* The "stream" cache policy will minimize memory cache usage if other
794 * memory operations need the cache.
795 */
796#define TGSI_MEMORY_STREAM_CACHE_POLICY (1 << 3)
797
798/**
799 * Specifies the type of memory access to do for the LOAD/STORE instruction.
800 */
801struct tgsi_instruction_memory
802{
803   unsigned Qualifier : 4;  /* TGSI_MEMORY_ */
804   unsigned Texture   : 8;  /* only for images: TGSI_TEXTURE_ */
805   unsigned Format    : 10; /* only for images: PIPE_FORMAT_ */
806   unsigned Padding   : 10;
807};
808
809#define TGSI_MEMBAR_SHADER_BUFFER (1 << 0)
810#define TGSI_MEMBAR_ATOMIC_BUFFER (1 << 1)
811#define TGSI_MEMBAR_SHADER_IMAGE  (1 << 2)
812#define TGSI_MEMBAR_SHARED        (1 << 3)
813#define TGSI_MEMBAR_THREAD_GROUP  (1 << 4)
814
815#ifdef __cplusplus
816}
817#endif
818
819#endif /* P_SHADER_TOKENS_H */
820