| /src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| CmpInstAnalysis.cpp | 22 ICmpInst::Predicate Pred = InvertPred ? ICI->getInversePredicate()
24 switch (Pred) {
43 CmpInst::Predicate &Pred) {
48 case 1: Pred = Sign ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break;
49 case 2: Pred = ICmpInst::ICMP_EQ; break;
50 case 3: Pred = Sign ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break;
51 case 4: Pred = Sign ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break;
52 case 5: Pred = ICmpInst::ICMP_NE; break;
53 case 6: Pred = Sign ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break;
67 CmpInst::Predicate &Pred,
[all...] |
| OverflowInstAnalysis.cpp | 24 ICmpInst::Predicate Pred;
29 if (!match(Op0, m_ICmp(Pred, m_Value(X), m_Zero())))
56 (IsAnd && Pred == ICmpInst::Predicate::ICMP_NE &&
58 (!IsAnd && Pred == ICmpInst::Predicate::ICMP_EQ &&
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| ScalarEvolutionNormalization.cpp | 34 // NB! Pred is a function_ref. Storing it here is okay only because
36 const NormalizePredTy Pred;
38 NormalizeDenormalizeRewriter(TransformKind Kind, NormalizePredTy Pred,
41 Pred(Pred) {}
53 if (!Pred(AR))
58 // Pred(AR) has returned true, we know we need to normalize or denormalize AR
99 auto Pred = [&](const SCEVAddRecExpr *AR) {
102 return NormalizeDenormalizeRewriter(Normalize, Pred, SE).visit(S);
105 const SCEV *llvm::normalizeForPostIncUseIf(const SCEV *S, NormalizePredTy Pred,
[all...] |
| AssumptionCache.cpp | 90 CmpInst::Predicate Pred;
91 if (match(Cond, m_ICmp(Pred, m_Value(A), m_Value(B)))) {
95 if (Pred == ICmpInst::ICMP_EQ) {
122 if (Pred == ICmpInst::ICMP_ULT &&
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| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| LiveRegUnits.h | 167 std::function<bool(const MachineOperand &)> Pred =
172 return make_filter_range(const_mi_bundle_ops(MI), Pred);
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| MachineTraceMetrics.h | 158 const MachineBasicBlock *Pred = nullptr;
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| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| LatencyPriorityQueue.cpp | 59 SUnit &Pred = *P.getSUnit();
60 if (!Pred.isScheduled) {
63 if (OnlyAvailablePred && OnlyAvailablePred != &Pred)
65 OnlyAvailablePred = &Pred;
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| /src/external/apache2/llvm/dist/llvm/examples/IRTransforms/ |
| SimplifyCFG.cpp | 271 BasicBlock *Pred = BB.getSinglePredecessor();
272 // Make sure BB has a single predecessor Pred and BB is the single
273 // successor of Pred.
274 if (!Pred || Pred->getSingleSuccessor() != &BB)
278 if (Pred == &BB)
282 BB.replaceAllUsesWith(Pred);
288 // Move all instructions from BB to Pred.
290 I.moveBefore(Pred->getTerminator());
292 // Remove the Pred's terminator (which jumped to BB). BB's terminato
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/FuzzMutate/ |
| OpDescriptor.h | 55 PredT Pred;
60 SourcePred(PredT Pred, MakeT Make) : Pred(Pred), Make(Make) {}
61 SourcePred(PredT Pred, NoneType) : Pred(Pred) {
62 Make = [Pred](ArrayRef<Value *> Cur, ArrayRef<Type *> BaseTypes) {
63 // Default filter just calls Pred on each of the base types.
67 if (Pred(Cur, V)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/FuzzMutate/ |
| IRMutator.cpp | 130 for (const auto &Pred : makeArrayRef(OpDesc->SourcePreds).slice(1))
131 Srcs.push_back(IB.findOrCreateSource(BB, InstsBefore, Srcs, Pred));
184 auto Pred = fuzzerop::onlyType(Inst.getType());
190 if (Pred.matches({}, &*I))
195 RS.sample(IB.newSource(*BB, InstsBefore, {}, Pred), /*Weight=*/1);
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| Operations.cpp | 125 CmpInst::Predicate Pred) {
126 auto buildOp = [CmpOp, Pred](ArrayRef<Value *> Srcs, Instruction *Inst) {
127 return CmpInst::Create(CmpOp, Pred, Srcs[0], Srcs[1], "C", Inst);
190 auto Pred = [](ArrayRef<Value *> Cur, const Value *V) {
208 return {Pred, Make};
222 auto Pred = [](ArrayRef<Value *> Cur, const Value *V) {
242 return {Pred, Make};
246 auto Pred = [](ArrayRef<Value *> Cur, const Value *V) {
267 return {Pred, Make};
301 auto Pred = [](ArrayRef<Value *> Cur, const Value *V)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiAsmPrinter.cpp | 218 const MachineBasicBlock *Pred = *MBB->pred_begin();
222 if (const BasicBlock *B = Pred->getBasicBlock())
232 MachineBasicBlock::const_iterator I = Pred->end();
233 while (I != Pred->begin() && !(--I)->isTerminator()) {
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| /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Core/ |
| ExprEngineObjC.cpp | 22 ExplodedNode *Pred,
24 ProgramStateRef state = Pred->getState();
25 const LocationContext *LCtx = Pred->getLocationContext();
30 StmtNodeBuilder Bldr(Pred, dstIvar, *currBldrCtx);
31 Bldr.generateNode(Ex, Pred, state->BindExpr(Ex, LCtx, location));
39 ExplodedNode *Pred,
41 getCheckerManager().runCheckersForPreStmt(Dst, Pred, S, *this);
52 for (ExplodedNode *Pred : dstLocation) {
53 ProgramStateRef state = Pred->getState();
54 const LocationContext *LCtx = Pred->getLocationContext()
[all...] |
| CoreEngine.cpp | 153 void CoreEngine::dispatchWorkItem(ExplodedNode* Pred, ProgramPoint Loc,
158 HandleBlockEdge(Loc.castAs<BlockEdge>(), Pred);
162 HandleBlockEntrance(Loc.castAs<BlockEntrance>(), Pred);
170 HandleCallEnter(Loc.castAs<CallEnter>(), Pred);
174 ExprEng.processCallExit(Pred);
178 assert(Pred->hasSinglePred() &&
180 ExplodedNode *PNode = Pred->getFirstPred();
181 dispatchWorkItem(Pred, PNode->getLocation(), WU);
191 HandlePostStmt(WU.getBlock(), WU.getIndex(), Pred);
208 void CoreEngine::HandleBlockEdge(const BlockEdge &L, ExplodedNode *Pred) {
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/Support/ |
| CFGDiff.h | 63 UpdateMapType Pred;
102 Pred[U.getTo()].DI[IsInsert].push_back(U.getFrom());
125 auto &PredDIList = Pred[U.getTo()];
130 Pred.erase(U.getTo());
144 auto &Children = (InverseEdge != InverseGraph) ? Pred : Succ;
167 printMap(OS, Pred);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| MVEVPTBlockPass.cpp | 243 ARMVCC::VPTCodes Pred = getVPTInstrPredicate(*MI, PredReg);
251 assert(Pred != ARMVCC::Else && "VPT block pass does not expect Else preds");
253 if (Pred == ARMVCC::None) {
|
| MLxExpansionPass.cpp | 281 ARMCC::CondCodes Pred = (ARMCC::CondCodes)MI->getOperand(NextOp).getImm();
295 MIB.addImm(Pred).addReg(PredReg);
307 MIB.addImm(Pred).addReg(PredReg);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCBranchSelector.cpp | 369 PPC::Predicate Pred = (PPC::Predicate)I->getOperand(0).getImm();
374 .addImm(PPC::InvertPredicate(Pred)).addReg(CRReg).addImm(2);
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| /src/external/apache2/llvm/dist/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| CheckerContext.h | 26 ExplodedNode *Pred;
42 ExplodedNode *pred,
46 Pred(pred),
51 assert(Pred->getState() &&
70 ExplodedNode *getPredecessor() { return Pred; }
71 const ProgramStateRef &getState() const { return Pred->getState(); }
92 return Pred->getLocationContext();
96 return Pred->getStackFrame();
125 return Pred->getLocationContext()->getAnalysisDeclContext()
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/Utils/ |
| SSAUpdaterImpl.h | 139 BlkT *Pred = Preds[p];
142 BBMap.FindAndConstruct(Pred);
149 ValT PredVal = AvailableVals->lookup(Pred);
150 BBInfo *PredInfo = new (Allocator) BBInfo(Pred, PredVal);
252 BBInfo *Pred = Info->Preds[p];
255 if (Pred->BlkNum == 0) {
256 Pred->AvailableVal = Traits::GetUndefVal(Pred->BB, Updater);
257 (*AvailableVals)[Pred->BB] = Pred->AvailableVal
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPULowerKernelAttributes.cpp | 185 ICmpInst::Predicate Pred;
187 m_Select(m_ICmp(Pred, SubExpr, m_Specific(ZextGroupSize)),
190 Pred == ICmpInst::ICMP_ULT) {
|
| AMDGPUPostLegalizerCombiner.cpp | 48 CmpInst::Predicate Pred;
87 m_GFCmp(m_Pred(Info.Pred), m_Reg(Info.LHS), m_Reg(Info.RHS))))
97 switch (Info.Pred) {
119 switch (Info.Pred) {
|
| SIModeRegister.cpp | 94 Status Pred;
330 BlockInfo[ThisBlock]->Pred = DefaultStatus;
347 BlockInfo[ThisBlock]->Pred = DefaultStatus;
350 BlockInfo[ThisBlock]->Pred = BlockInfo[PredBlock]->Exit;
356 MachineBasicBlock *Pred = *P;
357 unsigned PredBlock = Pred->getNumber();
360 BlockInfo[ThisBlock]->Pred =
361 BlockInfo[ThisBlock]->Pred.intersect(BlockInfo[PredBlock]->Exit);
363 BlockInfo[ThisBlock]->Pred = BlockInfo[PredBlock]->Exit;
371 BlockInfo[ThisBlock]->Pred.merge(BlockInfo[ThisBlock]->Change)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonGenPredicate.cpp | 36 #define DEBUG_TYPE "gen-pred"
131 INITIALIZE_PASS_BEGIN(HexagonGenPredicate, "hexagon-gen-pred",
134 INITIALIZE_PASS_END(HexagonGenPredicate, "hexagon-gen-pred",
429 RegisterSubReg Pred = getPredRegFor(GPR);
430 MIB.addReg(Pred.R, 0, Pred.S);
465 // Such sequences can be generated when a copy-into-pred is generated from
|
| HexagonRegisterInfo.cpp | 77 static const MCPhysReg Pred[] = {
98 return Pred;
|
