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      1 /*
      2  * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
      3  *                      Precision Insight, Inc., Cedar Park, Texas, and
      4  *                      VA Linux Systems Inc., Fremont, California.
      5  *
      6  * All Rights Reserved.
      7  *
      8  * Permission is hereby granted, free of charge, to any person obtaining
      9  * a copy of this software and associated documentation files (the
     10  * "Software"), to deal in the Software without restriction, including
     11  * without limitation on the rights to use, copy, modify, merge,
     12  * publish, distribute, sublicense, and/or sell copies of the Software,
     13  * and to permit persons to whom the Software is furnished to do so,
     14  * subject to the following conditions:
     15  *
     16  * The above copyright notice and this permission notice (including the
     17  * next paragraph) shall be included in all copies or substantial
     18  * portions of the Software.
     19  *
     20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     21  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     23  * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
     24  * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
     25  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     26  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     27  * OTHER DEALINGS IN THE SOFTWARE.
     28  */
     29 
     30 /*
     31  * Authors:
     32  *   Kevin E. Martin <martin (at) valinux.com>
     33  *   Rickard E. Faith <faith (at) valinux.com>
     34  *   Gareth Hughes <gareth (at) valinux.com>
     35  *
     36  */
     37 
     38 #ifndef _R128_DRI_
     39 #define _R128_DRI_
     40 
     41 #include "xf86drm.h"
     42 
     43 /* DRI Driver defaults */
     44 #define R128_DEFAULT_CCE_PIO_MODE R128_PM4_64PIO_64VCBM_64INDBM
     45 #define R128_DEFAULT_CCE_BM_MODE  R128_PM4_64BM_64VCBM_64INDBM
     46 #define R128_DEFAULT_AGP_MODE     1
     47 #define R128_DEFAULT_AGP_SIZE     8 /* MB (must be a power of 2 and > 4MB) */
     48 #define R128_DEFAULT_RING_SIZE    1 /* MB (must be page aligned) */
     49 #define R128_DEFAULT_BUFFER_SIZE  2 /* MB (must be page aligned) */
     50 #define R128_DEFAULT_AGP_TEX_SIZE 1 /* MB (must be page aligned) */
     51 
     52 #define R128_DEFAULT_CCE_TIMEOUT  10000  /* usecs */
     53 
     54 #define R128_AGP_MAX_MODE         4
     55 
     56 #define R128_CARD_TYPE_R128          1
     57 #define R128_CARD_TYPE_R128_PRO      2
     58 #define R128_CARD_TYPE_R128_MOBILITY 3
     59 
     60 #define R128CCE_USE_RING_BUFFER(m)                                        \
     61 (((m) == R128_PM4_192BM) ||                                               \
     62  ((m) == R128_PM4_128BM_64INDBM) ||                                       \
     63  ((m) == R128_PM4_64BM_128INDBM) ||                                       \
     64  ((m) == R128_PM4_64BM_64VCBM_64INDBM))
     65 
     66 typedef struct {
     67     /* DRI screen private data */
     68     int           deviceID;     /* PCI device ID */
     69     int           width;        /* Width in pixels of display */
     70     int           height;       /* Height in scanlines of display */
     71     int           depth;        /* Depth of display (8, 15, 16, 24) */
     72     int           bpp;          /* Bit depth of display (8, 16, 24, 32) */
     73 
     74     int           IsPCI;        /* Current card is a PCI card */
     75     int           AGPMode;
     76 
     77     int           frontOffset;  /* Start of front buffer */
     78     int           frontPitch;
     79     int           backOffset;   /* Start of shared back buffer */
     80     int           backPitch;
     81     int           depthOffset;  /* Start of shared depth buffer */
     82     int           depthPitch;
     83     int           spanOffset;   /* Start of scratch spanline */
     84     int           textureOffset;/* Start of texture data in frame buffer */
     85     int           textureSize;
     86     int           log2TexGran;
     87 
     88     /* MMIO register data */
     89     drm_handle_t     registerHandle;
     90     drmSize       registerSize;
     91 
     92     /* CCE AGP Texture data */
     93     drm_handle_t     agpTexHandle;
     94     drmSize       agpTexMapSize;
     95     int           log2AGPTexGran;
     96     int           agpTexOffset;
     97     unsigned int  sarea_priv_offset;
     98 } R128DRIRec, *R128DRIPtr;
     99 
    100 #endif
    101