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    Searched defs:RESET (Results 1 - 12 of 12) sorted by relevancy

  /src/sys/dev/mca/
if_lereg.h 42 #define RESET 0x08 /* Reset board */
  /src/lib/libc/net/
linkaddr.c 52 #define RESET 3
95 state = RESET;
102 case RESET | DIGIT:
111 state = RESET;
119 case RESET | END:
  /src/sys/arch/i386/stand/misc/
rawrite.c 33 #define RESET 0
66 case 0x05: msg("Reset failed (hard disk)"); break;
105 biosdisk(RESET, drive, 0, 0, 0, 0, buffer);
111 biosdisk(RESET, drive, 0, 0, 0, 0, buffer);
  /src/sys/arch/pmax/ibus/
sii.c 120 #define RESET 1
172 sii_Reset(sc, RESET);
289 * Reset the SII chip and do a SCSI reset if 'reset' is true.
290 * NOTE: if !cold && reset, should probably probe for devices
291 * since a SCSI bus reset will set UNIT_ATTENTION.
294 sii_Reset(struct siisoftc* sc, int reset)
295 /* reset: TRUE => reset SCSI bus *
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/radeon/
rv740d.h 58 #define RESET (1 << 30)
rv770d.h 131 #define RESET (1 << 30)
nid.h 573 #define RESET (1 << 30)
evergreend.h 111 #define RESET (1 << 30)
  /src/sys/dev/isa/
wt.c 101 RDMAPORT; /* reset DMA */
105 RESETMASK, /* to check after reset */
106 RESETVAL, /* state after reset */
109 RESET, /* reset command */
312 /* Reset DMA. */
392 /* Bad status, reset the controller. */
909 /* reset request */
1029 * Perform QIC-02 and QIC-36 compatible reset sequence.
1037 /* send reset */
    [all...]
  /src/sbin/rcorder/
rcorder.c 98 RESET = 0,
254 temp->in_progress = RESET;
306 head->in_progress = RESET;
352 pnode->head = RESET;
353 pnode->in_progress = RESET;
493 head->in_progress = RESET;
499 pnode->head = RESET;
500 pnode->in_progress = RESET;
  /src/sys/arch/luna68k/dev/xplx/
xplx.asm 41 ; 0000 00FF SH RESET/RST etc.
387 ; ######## RESET/RST
389 RESET:
430 XPBUS_STAT_RESET:: ; reset count
618 ; inc reset count
846 ; reset PRT0 interrupt
1027 ; reset PRT1 Interrupt
1045 ; PCM RESET attention
1607 ; attention=001, reset
1704 ; attention=001, reset
    [all...]
  /src/sys/dev/ata/
atavar.h 67 #define ERR_RESET 6 /* command was terminated by channel reset */
115 #define AT_RESET 0x0400 /* command terminated by channel reset */
202 #define C_RECOVERED 0x1000 /* error recovered, no need for reset */
207 #define KILL_RESET 2 /* xfer was reset */
273 #define ATA_DRIVE_RESET 0x0010 /* reset the drive state at next xfer */
280 #define ATA_DRIVE_TH_RESET 0x0800 /* drive waits for thread drive reset */
313 * This is reset to 0 after a channel reset.
317 #define RESET 0
411 #define ATACH_TH_RESET 0x200 /* someone ask the thread to reset */
    [all...]

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