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      1 /*      $NetBSD: sa11x0_ppcreg.h,v 1.5 2008/04/28 20:23:14 martin Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001, The NetBSD Foundation, Inc.  All rights reserved.
      5  *
      6  * This code is derived from software contributed to The NetBSD Foundation
      7  * by IWAMOTO Toshihiro.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  *
     18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     28  * POSSIBILITY OF SUCH DAMAGE.
     29  */
     30 
     31 /* SA11[01]0 PPC (peripheral pin controller) */
     32 
     33 /* size of I/O space */
     34 #define SAPPC_NPORTS	13
     35 
     36 #define SAPPC_PDR	0x00	/* pin direction register */
     37 
     38 #define SAPPC_PSR	0x04	/* pin state register */
     39 
     40 #define SAPPC_PAR	0x08	/* pin assignment register */
     41 #define PAR_UPR		0x01000	/* UART pin assignment */
     42 #define PAR_SPR		0x40000	/* SSP pin assignment */
     43 
     44 #define SAPPC_SDR	0x0C	/* sleep mode direction register */
     45 
     46 #define SAPPC_PFR	0x10	/* pin flag register */
     47 #define PFR_LCD		0x00001	/* LCD controller flag */
     48 #define PFR_SP1TX	0x01000	/* serial port 1 Tx flag */
     49 #define PFR_SP1RX	0x02000	/* serial port 1 Rx flag */
     50 #define PFR_SP2TX	0x04000	/* serial port 2 Tx flag */
     51 #define PFR_SP2RX	0x08000	/* serial port 2 Rx flag */
     52 #define PFR_SP3TX	0x10000	/* serial port 3 Tx flag */
     53 #define PFR_SP3RX	0x20000	/* serial port 3 Rx flag */
     54 #define PFR_SP4		0x40000	/* serial port 4 flag */
     55 
     56 /* MCP control register 1 */
     57 #define SAMCP_CR1	0x30	/* MCP control register 1 */
     58