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      1 /*	$NetBSD: sun4i_spireg.h,v 1.1 2019/08/03 13:28:42 tnn Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2019 Tobias Nygren
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
     20  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     21  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     22  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     23  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     24  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     25  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     26  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #ifndef _SUNXI_SUN4I_SPIREG_H_
     30 #define _SUNXI_SUN4I_SPIREG_H_
     31 
     32 #include <sys/cdefs.h>
     33 
     34 #define SPI_RXDATA		0x00
     35 
     36 #define SPI_TXDATA		0x04
     37 
     38 #define SPI_CTL			0x08
     39 #define SPI_CTL_SDM		__BIT(20)
     40 #define SPI_CTL_SDC		__BIT(19)
     41 #define SPI_CTL_TP_EN		__BIT(18)
     42 #define SPI_CTL_SS_LEVEL	__BIT(17)
     43 #define SPI_CTL_SS_CTRL		__BIT(16)
     44 #define SPI_CTL_DHB		__BIT(15)
     45 #define SPI_CTL_DDB		__BIT(14)
     46 #define SPI_CTL_SS		__BITS(13, 12)
     47 #define SPI_CTL_RPSM		__BIT(11)
     48 #define SPI_CTL_XCH		__BIT(10)
     49 #define SPI_CTL_RF_RST		__BIT(9)
     50 #define SPI_CTL_TF_RST		__BIT(8)
     51 #define SPI_CTL_SSCTL		__BIT(7)
     52 #define SPI_CTL_LMTF		__BIT(6)
     53 #define SPI_CTL_DMAMC		__BIT(5)
     54 #define SPI_CTL_SSPOL		__BIT(4)
     55 #define SPI_CTL_POL		__BIT(3)
     56 #define SPI_CTL_PHA		__BIT(2)
     57 #define SPI_CTL_MODE		__BIT(1)
     58 #define SPI_CTL_EN		__BIT(0)
     59 
     60 #define SPI_INTCTL			0x0c
     61 #define SPI_INTCTL_SS_INT_EN		__BIT(17)
     62 #define SPI_INTCTL_TX_INT_EN		__BIT(16)
     63 #define SPI_INTCTL_TF_UR_INT_EN		__BIT(14)
     64 #define SPI_INTCTL_TF_OF_INT_EN		__BIT(13)
     65 #define SPI_INTCTL_TF_E34_INT_EN	__BIT(12)
     66 #define SPI_INTCTL_TF_E14_INT_EN	__BIT(11)
     67 #define SPI_INTCTL_TF_FL_INT_EN		__BIT(10)
     68 #define SPI_INTCTL_TF_HALF_EMP_INT_EN	__BIT(9)
     69 #define SPI_INTCTL_TF_EMP_INT_EN	__BIT(8)
     70 #define SPI_INTCTL_RF_UR_INT_EN		__BIT(6)
     71 #define SPI_INTCTL_RF_OF_INT_EN		__BIT(5)
     72 #define SPI_INTCTL_RF_F34_INT_EN	__BIT(4)
     73 #define SPI_INTCTL_RF_F14_INT_EN	__BIT(3)
     74 #define SPI_INTCTL_RF_FU_INT_EN		__BIT(2)
     75 #define SPI_INTCTL_RF_HALF_FU_INT_EN	__BIT(1)
     76 #define SPI_INTCTL_RF_RDY_INT_EN	__BIT(0)
     77 
     78 #define SPI_INT_STA		0x10
     79 #define SPI_INT_STA_INT_CBF	__BIT(31)
     80 #define SPI_INT_STA_SSI		__BIT(17)
     81 #define SPI_INT_STA_TC		__BIT(16)
     82 #define SPI_INT_STA_TU		__BIT(14)
     83 #define SPI_INT_STA_TO		__BIT(13)
     84 #define SPI_INT_STA_TE34	__BIT(12)
     85 #define SPI_INT_STA_TE14	__BIT(11)
     86 #define SPI_INT_STA_TF		__BIT(10)
     87 #define SPI_INT_STA_THE		__BIT(9)
     88 #define SPI_INT_STA_TE		__BIT(8)
     89 #define SPI_INT_STA_RU		__BIT(6)
     90 #define SPI_INT_STA_RO		__BIT(5)
     91 #define SPI_INT_STA_RF34	__BIT(4)
     92 #define SPI_INT_STA_RF14	__BIT(3)
     93 #define SPI_INT_STA_RF		__BIT(2)
     94 #define SPI_INT_STA_RHF		__BIT(1)
     95 #define SPI_INT_STA_RR		__BIT(0)
     96 
     97 #define SPI_DMACTL		0x14
     98 #define SPI_DMACTL_TF_EMP34_DMA	__BIT(12)
     99 #define SPI_DMACTL_TF_EMP14_DMA	__BIT(11)
    100 #define SPI_DMACTL_TF_NF_DMA	__BIT(10)
    101 #define SPI_DMACTL_TF_HE_DMA	__BIT(9)
    102 #define SPI_DMACTL_TF_EMP_DMA	__BIT(8)
    103 #define SPI_DMACTL_RF_FU34_DMA	__BIT(4)
    104 #define SPI_DMACTL_RF_FU14_DMA	__BIT(3)
    105 #define SPI_DMACTL_RF_FU_DMA	__BIT(2)
    106 #define SPI_DMACTL_RF_HF_DMA	__BIT(1)
    107 #define SPI_DMACTL_RF_RDY_DMA	__BIT(0)
    108 
    109 #define SPI_WAIT		0x18
    110 #define SPI_WAIT_WCC		__BITS(15, 0)
    111 
    112 #define SPI_CCTL		0x1c
    113 #define SPI_CCTL_DRS		__BIT(12)
    114 #define SPI_CCTL_CDR1		__BITS(11, 8)
    115 #define SPI_CCTL_CDR2		__BITS(7, 0)
    116 
    117 #define SPI_BC			0x20
    118 #define SPI_BC_BC		__BITS(23, 0)
    119 
    120 #define SPI_TC			0x24
    121 #define SPI_TC_WTC		__BITS(23, 0)
    122 
    123 #define SPI_FIFO_STA		0x28
    124 #define SPI_FIFO_STA_TF_CNT	__BITS(22, 16)
    125 #define SPI_FIFO_STA_RF_CNT	__BITS(6, 0)
    126 
    127 #endif /* _SUNXI_SUN4I_SPIREG_H_ */
    128