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      1 // SPDX-License-Identifier: GPL-2.0-only
      2 /*
      3  *  linux/arch/arm/boot/nspire.dtsi
      4  *
      5  *  Copyright (C) 2013 Daniel Tang <tangrs (a] tangrs.id.au>
      6  */
      7 
      8 / {
      9 	#address-cells = <1>;
     10 	#size-cells = <1>;
     11 	interrupt-parent = <&intc>;
     12 
     13 	cpus {
     14 		cpu@0 {
     15 			compatible = "arm,arm926ej-s";
     16 		};
     17 	};
     18 
     19 	bootrom: bootrom@0 {
     20 		reg = <0x00000000 0x80000>;
     21 	};
     22 
     23 	sram: sram@A4000000 {
     24 		device = "memory";
     25 		reg = <0xA4000000 0x20000>;
     26 	};
     27 
     28 	timer_clk: timer_clk {
     29 		#clock-cells = <0>;
     30 		compatible = "fixed-clock";
     31 		clock-frequency = <32768>;
     32 	};
     33 
     34 	base_clk: base_clk {
     35 		#clock-cells = <0>;
     36 		reg = <0x900B0024 0x4>;
     37 	};
     38 
     39 	ahb_clk: ahb_clk {
     40 		#clock-cells = <0>;
     41 		reg = <0x900B0024 0x4>;
     42 		clocks = <&base_clk>;
     43 	};
     44 
     45 	apb_pclk: apb_pclk {
     46 		#clock-cells = <0>;
     47 		compatible = "fixed-factor-clock";
     48 		clock-div = <2>;
     49 		clock-mult = <1>;
     50 		clocks = <&ahb_clk>;
     51 	};
     52 
     53 	usb_phy: usb_phy {
     54 		compatible = "usb-nop-xceiv";
     55 		#phy-cells = <0>;
     56 	};
     57 
     58 	vbus_reg: vbus_reg {
     59 		compatible = "regulator-fixed";
     60 
     61 		regulator-name = "USB VBUS output";
     62 		regulator-type = "voltage";
     63 
     64 		regulator-min-microvolt = <5000000>;
     65 		regulator-max-microvolt = <5000000>;
     66 	};
     67 
     68 	ahb {
     69 		compatible = "simple-bus";
     70 		#address-cells = <1>;
     71 		#size-cells = <1>;
     72 		ranges;
     73 
     74 		spi: spi@A9000000 {
     75 			reg = <0xA9000000 0x1000>;
     76 		};
     77 
     78 		usb0: usb@B0000000 {
     79 			compatible = "lsi,zevio-usb";
     80 			reg = <0xB0000000 0x1000>;
     81 			interrupts = <8>;
     82 
     83 			usb-phy = <&usb_phy>;
     84 			vbus-supply = <&vbus_reg>;
     85 		};
     86 
     87 		usb1: usb@B4000000 {
     88 			reg = <0xB4000000 0x1000>;
     89 			interrupts = <9>;
     90 			status = "disabled";
     91 		};
     92 
     93 		lcd: lcd@C0000000 {
     94 			compatible = "arm,pl111", "arm,primecell";
     95 			reg = <0xC0000000 0x1000>;
     96 			interrupts = <21>;
     97 
     98 			/*
     99 			 * We assume the same clock is fed to APB and CLCDCLK.
    100 			 * There is some code to scale the clock down by a factor
    101 			 * 48 for the display so likely the frequency to the
    102 			 * display is 1MHz and the CLCDCLK is 48 MHz.
    103 			 */
    104 			clocks = <&apb_pclk>, <&apb_pclk>;
    105 			clock-names = "clcdclk", "apb_pclk";
    106 		};
    107 
    108 		adc: adc@C4000000 {
    109 			reg = <0xC4000000 0x1000>;
    110 			interrupts = <11>;
    111 		};
    112 
    113 		tdes: crypto@C8010000 {
    114 			reg = <0xC8010000 0x1000>;
    115 		};
    116 
    117 		sha256: crypto@CC000000 {
    118 			reg = <0xCC000000 0x1000>;
    119 		};
    120 
    121 		apb@90000000 {
    122 			compatible = "simple-bus";
    123 			#address-cells = <1>;
    124 			#size-cells = <1>;
    125 			clock-ranges;
    126 			ranges;
    127 
    128 			gpio: gpio@90000000 {
    129 				compatible = "lsi,zevio-gpio";
    130 				reg = <0x90000000 0x1000>;
    131 				interrupts = <7>;
    132 				gpio-controller;
    133 				#gpio-cells = <2>;
    134 			};
    135 
    136 			fast_timer: timer@90010000 {
    137 				reg = <0x90010000 0x1000>;
    138 				interrupts = <17>;
    139 			};
    140 
    141 			uart: serial@90020000 {
    142 				reg = <0x90020000 0x1000>;
    143 				interrupts = <1>;
    144 			};
    145 
    146 			timer0: timer@900C0000 {
    147 				reg = <0x900C0000 0x1000>;
    148 				clocks = <&timer_clk>, <&timer_clk>,
    149 					 <&timer_clk>;
    150 				clock-names = "timer0clk", "timer1clk",
    151 					      "apb_pclk";
    152 			};
    153 
    154 			timer1: timer@900D0000 {
    155 				reg = <0x900D0000 0x1000>;
    156 				interrupts = <19>;
    157 				clocks = <&timer_clk>, <&timer_clk>,
    158 					 <&timer_clk>;
    159 				clock-names = "timer0clk", "timer1clk",
    160 					      "apb_pclk";
    161 			};
    162 
    163 			watchdog: watchdog@90060000 {
    164 				compatible = "arm,amba-primecell";
    165 				reg = <0x90060000 0x1000>;
    166 				interrupts = <3>;
    167 			};
    168 
    169 			rtc: rtc@90090000 {
    170 				reg = <0x90090000 0x1000>;
    171 				interrupts = <4>;
    172 			};
    173 
    174 			misc: misc@900A0000 {
    175 				reg = <0x900A0000 0x1000>;
    176 			};
    177 
    178 			pwr: pwr@900B0000 {
    179 				reg = <0x900B0000 0x1000>;
    180 				interrupts = <15>;
    181 			};
    182 
    183 			keypad: input@900E0000 {
    184 				compatible = "ti,nspire-keypad";
    185 				reg = <0x900E0000 0x1000>;
    186 				interrupts = <16>;
    187 
    188 				scan-interval = <1000>;
    189 				row-delay = <200>;
    190 
    191 				clocks = <&apb_pclk>;
    192 			};
    193 
    194 			contrast: contrast@900F0000 {
    195 				reg = <0x900F0000 0x1000>;
    196 			};
    197 
    198 			led: led@90110000 {
    199 				reg = <0x90110000 0x1000>;
    200 			};
    201 		};
    202 	};
    203 };
    204