1 /* 2 * Copyright 2016 Red Hat. 3 * Copyright 2016 Bas Nieuwenhuizen 4 * 5 * based in part on anv driver which is: 6 * Copyright 2015 Intel Corporation 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the next 16 * paragraph) shall be included in all copies or substantial portions of the 17 * Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 25 * DEALINGS IN THE SOFTWARE. 26 */ 27 28 #ifndef TU_PRIVATE_H 29 #define TU_PRIVATE_H 30 31 #include <assert.h> 32 #include <pthread.h> 33 #include <stdbool.h> 34 #include <stdint.h> 35 #include <stdio.h> 36 #include <stdlib.h> 37 #include <string.h> 38 #ifdef HAVE_VALGRIND 39 #include <memcheck.h> 40 #include <valgrind.h> 41 #define VG(x) x 42 #else 43 #define VG(x) 44 #endif 45 46 #include "c11/threads.h" 47 #include "compiler/shader_enums.h" 48 #include "main/macros.h" 49 #include "util/list.h" 50 #include "util/macros.h" 51 #include "vk_alloc.h" 52 #include "vk_debug_report.h" 53 #include "wsi_common.h" 54 55 #include "drm/msm_drm.h" 56 #include "ir3/ir3_compiler.h" 57 #include "ir3/ir3_shader.h" 58 59 #include "adreno_common.xml.h" 60 #include "adreno_pm4.xml.h" 61 #include "a6xx.xml.h" 62 63 #include "tu_descriptor_set.h" 64 #include "tu_extensions.h" 65 66 /* Pre-declarations needed for WSI entrypoints */ 67 struct wl_surface; 68 struct wl_display; 69 typedef struct xcb_connection_t xcb_connection_t; 70 typedef uint32_t xcb_visualid_t; 71 typedef uint32_t xcb_window_t; 72 73 #include <vulkan/vk_android_native_buffer.h> 74 #include <vulkan/vk_icd.h> 75 #include <vulkan/vulkan.h> 76 #include <vulkan/vulkan_intel.h> 77 78 #include "tu_entrypoints.h" 79 80 #define MAX_VBS 32 81 #define MAX_VERTEX_ATTRIBS 32 82 #define MAX_RTS 8 83 #define MAX_VSC_PIPES 32 84 #define MAX_VIEWPORTS 1 85 #define MAX_SCISSORS 16 86 #define MAX_DISCARD_RECTANGLES 4 87 #define MAX_PUSH_CONSTANTS_SIZE 128 88 #define MAX_PUSH_DESCRIPTORS 32 89 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16 90 #define MAX_DYNAMIC_STORAGE_BUFFERS 8 91 #define MAX_DYNAMIC_BUFFERS \ 92 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS) 93 #define MAX_SAMPLES_LOG2 4 94 #define NUM_META_FS_KEYS 13 95 #define TU_MAX_DRM_DEVICES 8 96 #define MAX_VIEWS 8 97 98 #define NUM_DEPTH_CLEAR_PIPELINES 3 99 100 /* 101 * This is the point we switch from using CP to compute shader 102 * for certain buffer operations. 103 */ 104 #define TU_BUFFER_OPS_CS_THRESHOLD 4096 105 106 enum tu_mem_heap 107 { 108 TU_MEM_HEAP_VRAM, 109 TU_MEM_HEAP_VRAM_CPU_ACCESS, 110 TU_MEM_HEAP_GTT, 111 TU_MEM_HEAP_COUNT 112 }; 113 114 enum tu_mem_type 115 { 116 TU_MEM_TYPE_VRAM, 117 TU_MEM_TYPE_GTT_WRITE_COMBINE, 118 TU_MEM_TYPE_VRAM_CPU_ACCESS, 119 TU_MEM_TYPE_GTT_CACHED, 120 TU_MEM_TYPE_COUNT 121 }; 122 123 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b))) 124 125 static inline uint32_t 126 align_u32(uint32_t v, uint32_t a) 127 { 128 assert(a != 0 && a == (a & -a)); 129 return (v + a - 1) & ~(a - 1); 130 } 131 132 static inline uint32_t 133 align_u32_npot(uint32_t v, uint32_t a) 134 { 135 return (v + a - 1) / a * a; 136 } 137 138 static inline uint64_t 139 align_u64(uint64_t v, uint64_t a) 140 { 141 assert(a != 0 && a == (a & -a)); 142 return (v + a - 1) & ~(a - 1); 143 } 144 145 static inline int32_t 146 align_i32(int32_t v, int32_t a) 147 { 148 assert(a != 0 && a == (a & -a)); 149 return (v + a - 1) & ~(a - 1); 150 } 151 152 /** Alignment must be a power of 2. */ 153 static inline bool 154 tu_is_aligned(uintmax_t n, uintmax_t a) 155 { 156 assert(a == (a & -a)); 157 return (n & (a - 1)) == 0; 158 } 159 160 static inline uint32_t 161 round_up_u32(uint32_t v, uint32_t a) 162 { 163 return (v + a - 1) / a; 164 } 165 166 static inline uint64_t 167 round_up_u64(uint64_t v, uint64_t a) 168 { 169 return (v + a - 1) / a; 170 } 171 172 static inline uint32_t 173 tu_minify(uint32_t n, uint32_t levels) 174 { 175 if (unlikely(n == 0)) 176 return 0; 177 else 178 return MAX2(n >> levels, 1); 179 } 180 static inline float 181 tu_clamp_f(float f, float min, float max) 182 { 183 assert(min < max); 184 185 if (f > max) 186 return max; 187 else if (f < min) 188 return min; 189 else 190 return f; 191 } 192 193 static inline bool 194 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask) 195 { 196 if (*inout_mask & clear_mask) { 197 *inout_mask &= ~clear_mask; 198 return true; 199 } else { 200 return false; 201 } 202 } 203 204 #define for_each_bit(b, dword) \ 205 for (uint32_t __dword = (dword); \ 206 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b))) 207 208 #define typed_memcpy(dest, src, count) \ 209 ({ \ 210 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \ 211 memcpy((dest), (src), (count) * sizeof(*(src))); \ 212 }) 213 214 /* Whenever we generate an error, pass it through this function. Useful for 215 * debugging, where we can break on it. Only call at error site, not when 216 * propagating errors. Might be useful to plug in a stack trace here. 217 */ 218 219 struct tu_instance; 220 221 VkResult 222 __vk_errorf(struct tu_instance *instance, 223 VkResult error, 224 const char *file, 225 int line, 226 const char *format, 227 ...); 228 229 #define vk_error(instance, error) \ 230 __vk_errorf(instance, error, __FILE__, __LINE__, NULL); 231 #define vk_errorf(instance, error, format, ...) \ 232 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__); 233 234 void 235 __tu_finishme(const char *file, int line, const char *format, ...) 236 tu_printflike(3, 4); 237 void 238 tu_loge(const char *format, ...) tu_printflike(1, 2); 239 void 240 tu_loge_v(const char *format, va_list va); 241 void 242 tu_logi(const char *format, ...) tu_printflike(1, 2); 243 void 244 tu_logi_v(const char *format, va_list va); 245 246 /** 247 * Print a FINISHME message, including its source location. 248 */ 249 #define tu_finishme(format, ...) \ 250 do { \ 251 static bool reported = false; \ 252 if (!reported) { \ 253 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \ 254 reported = true; \ 255 } \ 256 } while (0) 257 258 /* A non-fatal assert. Useful for debugging. */ 259 #ifdef DEBUG 260 #define tu_assert(x) \ 261 ({ \ 262 if (unlikely(!(x))) \ 263 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \ 264 }) 265 #else 266 #define tu_assert(x) 267 #endif 268 269 /* Suppress -Wunused in stub functions */ 270 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__) 271 static inline void 272 __tu_use_args(int ignore, ...) 273 { 274 } 275 276 #define tu_stub() \ 277 do { \ 278 tu_finishme("stub %s", __func__); \ 279 } while (0) 280 281 void * 282 tu_lookup_entrypoint_unchecked(const char *name); 283 void * 284 tu_lookup_entrypoint_checked( 285 const char *name, 286 uint32_t core_version, 287 const struct tu_instance_extension_table *instance, 288 const struct tu_device_extension_table *device); 289 290 struct tu_physical_device 291 { 292 VK_LOADER_DATA _loader_data; 293 294 struct tu_instance *instance; 295 296 char path[20]; 297 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE]; 298 uint8_t driver_uuid[VK_UUID_SIZE]; 299 uint8_t device_uuid[VK_UUID_SIZE]; 300 uint8_t cache_uuid[VK_UUID_SIZE]; 301 302 struct wsi_device wsi_device; 303 304 int local_fd; 305 int master_fd; 306 307 unsigned gpu_id; 308 uint32_t gmem_size; 309 uint32_t tile_align_w; 310 uint32_t tile_align_h; 311 312 /* This is the drivers on-disk cache used as a fallback as opposed to 313 * the pipeline cache defined by apps. 314 */ 315 struct disk_cache *disk_cache; 316 317 struct tu_device_extension_table supported_extensions; 318 }; 319 320 enum tu_debug_flags 321 { 322 TU_DEBUG_STARTUP = 1 << 0, 323 TU_DEBUG_NIR = 1 << 1, 324 TU_DEBUG_IR3 = 1 << 2, 325 }; 326 327 struct tu_instance 328 { 329 VK_LOADER_DATA _loader_data; 330 331 VkAllocationCallbacks alloc; 332 333 uint32_t api_version; 334 int physical_device_count; 335 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES]; 336 337 enum tu_debug_flags debug_flags; 338 339 struct vk_debug_report_instance debug_report_callbacks; 340 341 struct tu_instance_extension_table enabled_extensions; 342 }; 343 344 VkResult 345 tu_wsi_init(struct tu_physical_device *physical_device); 346 void 347 tu_wsi_finish(struct tu_physical_device *physical_device); 348 349 bool 350 tu_instance_extension_supported(const char *name); 351 uint32_t 352 tu_physical_device_api_version(struct tu_physical_device *dev); 353 bool 354 tu_physical_device_extension_supported(struct tu_physical_device *dev, 355 const char *name); 356 357 struct cache_entry; 358 359 struct tu_pipeline_cache 360 { 361 struct tu_device *device; 362 pthread_mutex_t mutex; 363 364 uint32_t total_size; 365 uint32_t table_size; 366 uint32_t kernel_count; 367 struct cache_entry **hash_table; 368 bool modified; 369 370 VkAllocationCallbacks alloc; 371 }; 372 373 struct tu_pipeline_key 374 { 375 }; 376 377 void 378 tu_pipeline_cache_init(struct tu_pipeline_cache *cache, 379 struct tu_device *device); 380 void 381 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache); 382 void 383 tu_pipeline_cache_load(struct tu_pipeline_cache *cache, 384 const void *data, 385 size_t size); 386 387 struct tu_shader_variant; 388 389 bool 390 tu_create_shader_variants_from_pipeline_cache( 391 struct tu_device *device, 392 struct tu_pipeline_cache *cache, 393 const unsigned char *sha1, 394 struct tu_shader_variant **variants); 395 396 void 397 tu_pipeline_cache_insert_shaders(struct tu_device *device, 398 struct tu_pipeline_cache *cache, 399 const unsigned char *sha1, 400 struct tu_shader_variant **variants, 401 const void *const *codes, 402 const unsigned *code_sizes); 403 404 struct tu_meta_state 405 { 406 VkAllocationCallbacks alloc; 407 408 struct tu_pipeline_cache cache; 409 }; 410 411 /* queue types */ 412 #define TU_QUEUE_GENERAL 0 413 414 #define TU_MAX_QUEUE_FAMILIES 1 415 416 struct tu_fence 417 { 418 bool signaled; 419 int fd; 420 }; 421 422 void 423 tu_fence_init(struct tu_fence *fence, bool signaled); 424 void 425 tu_fence_finish(struct tu_fence *fence); 426 void 427 tu_fence_update_fd(struct tu_fence *fence, int fd); 428 void 429 tu_fence_copy(struct tu_fence *fence, const struct tu_fence *src); 430 void 431 tu_fence_signal(struct tu_fence *fence); 432 void 433 tu_fence_wait_idle(struct tu_fence *fence); 434 435 struct tu_queue 436 { 437 VK_LOADER_DATA _loader_data; 438 struct tu_device *device; 439 uint32_t queue_family_index; 440 int queue_idx; 441 VkDeviceQueueCreateFlags flags; 442 443 uint32_t msm_queue_id; 444 struct tu_fence submit_fence; 445 }; 446 447 struct tu_device 448 { 449 VK_LOADER_DATA _loader_data; 450 451 VkAllocationCallbacks alloc; 452 453 struct tu_instance *instance; 454 455 struct tu_meta_state meta_state; 456 457 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES]; 458 int queue_count[TU_MAX_QUEUE_FAMILIES]; 459 460 struct tu_physical_device *physical_device; 461 462 struct ir3_compiler *compiler; 463 464 /* Backup in-memory cache to be used if the app doesn't provide one */ 465 struct tu_pipeline_cache *mem_cache; 466 467 struct list_head shader_slabs; 468 mtx_t shader_slab_mutex; 469 470 struct tu_device_extension_table enabled_extensions; 471 }; 472 473 struct tu_bo 474 { 475 uint32_t gem_handle; 476 uint64_t size; 477 uint64_t iova; 478 void *map; 479 }; 480 481 VkResult 482 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size); 483 VkResult 484 tu_bo_init_dmabuf(struct tu_device *dev, 485 struct tu_bo *bo, 486 uint64_t size, 487 int fd); 488 int 489 tu_bo_export_dmabuf(struct tu_device *dev, struct tu_bo *bo); 490 void 491 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo); 492 VkResult 493 tu_bo_map(struct tu_device *dev, struct tu_bo *bo); 494 495 struct tu_cs_entry 496 { 497 /* No ownership */ 498 const struct tu_bo *bo; 499 500 uint32_t size; 501 uint32_t offset; 502 }; 503 504 enum tu_cs_mode 505 { 506 507 /* 508 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it 509 * is full. tu_cs_begin must be called before command packet emission and 510 * tu_cs_end must be called after. 511 * 512 * This mode may create multiple entries internally. The entries must be 513 * submitted together. 514 */ 515 TU_CS_MODE_GROW, 516 517 /* 518 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external, 519 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no 520 * effect on it. 521 * 522 * This mode does not create any entry or any BO. 523 */ 524 TU_CS_MODE_EXTERNAL, 525 526 /* 527 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct 528 * command packet emission. tu_cs_begin_sub_stream must be called to get a 529 * sub-stream to emit comamnd packets to. When done with the sub-stream, 530 * tu_cs_end_sub_stream must be called. 531 * 532 * This mode does not create any entry internally. 533 */ 534 TU_CS_MODE_SUB_STREAM, 535 }; 536 537 struct tu_cs 538 { 539 uint32_t *start; 540 uint32_t *cur; 541 uint32_t *reserved_end; 542 uint32_t *end; 543 544 enum tu_cs_mode mode; 545 uint32_t next_bo_size; 546 547 struct tu_cs_entry *entries; 548 uint32_t entry_count; 549 uint32_t entry_capacity; 550 551 struct tu_bo **bos; 552 uint32_t bo_count; 553 uint32_t bo_capacity; 554 }; 555 556 struct tu_device_memory 557 { 558 struct tu_bo bo; 559 VkDeviceSize size; 560 561 /* for dedicated allocations */ 562 struct tu_image *image; 563 struct tu_buffer *buffer; 564 565 uint32_t type_index; 566 void *map; 567 void *user_ptr; 568 }; 569 570 struct tu_descriptor_range 571 { 572 uint64_t va; 573 uint32_t size; 574 }; 575 576 struct tu_descriptor_set 577 { 578 const struct tu_descriptor_set_layout *layout; 579 uint32_t size; 580 581 uint64_t va; 582 uint32_t *mapped_ptr; 583 struct tu_descriptor_range *dynamic_descriptors; 584 }; 585 586 struct tu_push_descriptor_set 587 { 588 struct tu_descriptor_set set; 589 uint32_t capacity; 590 }; 591 592 struct tu_descriptor_pool_entry 593 { 594 uint32_t offset; 595 uint32_t size; 596 struct tu_descriptor_set *set; 597 }; 598 599 struct tu_descriptor_pool 600 { 601 uint8_t *mapped_ptr; 602 uint64_t current_offset; 603 uint64_t size; 604 605 uint8_t *host_memory_base; 606 uint8_t *host_memory_ptr; 607 uint8_t *host_memory_end; 608 609 uint32_t entry_count; 610 uint32_t max_entry_count; 611 struct tu_descriptor_pool_entry entries[0]; 612 }; 613 614 struct tu_descriptor_update_template_entry 615 { 616 VkDescriptorType descriptor_type; 617 618 /* The number of descriptors to update */ 619 uint32_t descriptor_count; 620 621 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array 622 */ 623 uint32_t dst_offset; 624 625 /* In dwords. Not valid/used for dynamic descriptors */ 626 uint32_t dst_stride; 627 628 uint32_t buffer_offset; 629 630 /* Only valid for combined image samplers and samplers */ 631 uint16_t has_sampler; 632 633 /* In bytes */ 634 size_t src_offset; 635 size_t src_stride; 636 637 /* For push descriptors */ 638 const uint32_t *immutable_samplers; 639 }; 640 641 struct tu_descriptor_update_template 642 { 643 uint32_t entry_count; 644 VkPipelineBindPoint bind_point; 645 struct tu_descriptor_update_template_entry entry[0]; 646 }; 647 648 struct tu_buffer 649 { 650 VkDeviceSize size; 651 652 VkBufferUsageFlags usage; 653 VkBufferCreateFlags flags; 654 655 struct tu_bo *bo; 656 VkDeviceSize bo_offset; 657 }; 658 659 enum tu_dynamic_state_bits 660 { 661 TU_DYNAMIC_VIEWPORT = 1 << 0, 662 TU_DYNAMIC_SCISSOR = 1 << 1, 663 TU_DYNAMIC_LINE_WIDTH = 1 << 2, 664 TU_DYNAMIC_DEPTH_BIAS = 1 << 3, 665 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4, 666 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5, 667 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, 668 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, 669 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8, 670 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9, 671 TU_DYNAMIC_ALL = (1 << 10) - 1, 672 }; 673 674 struct tu_vertex_binding 675 { 676 struct tu_buffer *buffer; 677 VkDeviceSize offset; 678 }; 679 680 struct tu_viewport_state 681 { 682 uint32_t count; 683 VkViewport viewports[MAX_VIEWPORTS]; 684 }; 685 686 struct tu_scissor_state 687 { 688 uint32_t count; 689 VkRect2D scissors[MAX_SCISSORS]; 690 }; 691 692 struct tu_discard_rectangle_state 693 { 694 uint32_t count; 695 VkRect2D rectangles[MAX_DISCARD_RECTANGLES]; 696 }; 697 698 struct tu_dynamic_state 699 { 700 /** 701 * Bitmask of (1 << VK_DYNAMIC_STATE_*). 702 * Defines the set of saved dynamic state. 703 */ 704 uint32_t mask; 705 706 struct tu_viewport_state viewport; 707 708 struct tu_scissor_state scissor; 709 710 float line_width; 711 712 struct 713 { 714 float bias; 715 float clamp; 716 float slope; 717 } depth_bias; 718 719 float blend_constants[4]; 720 721 struct 722 { 723 float min; 724 float max; 725 } depth_bounds; 726 727 struct 728 { 729 uint32_t front; 730 uint32_t back; 731 } stencil_compare_mask; 732 733 struct 734 { 735 uint32_t front; 736 uint32_t back; 737 } stencil_write_mask; 738 739 struct 740 { 741 uint32_t front; 742 uint32_t back; 743 } stencil_reference; 744 745 struct tu_discard_rectangle_state discard_rectangle; 746 }; 747 748 extern const struct tu_dynamic_state default_dynamic_state; 749 750 const char * 751 tu_get_debug_option_name(int id); 752 753 const char * 754 tu_get_perftest_option_name(int id); 755 756 /** 757 * Attachment state when recording a renderpass instance. 758 * 759 * The clear value is valid only if there exists a pending clear. 760 */ 761 struct tu_attachment_state 762 { 763 VkImageAspectFlags pending_clear_aspects; 764 uint32_t cleared_views; 765 VkClearValue clear_value; 766 VkImageLayout current_layout; 767 }; 768 769 struct tu_descriptor_state 770 { 771 struct tu_descriptor_set *sets[MAX_SETS]; 772 uint32_t dirty; 773 uint32_t valid; 774 struct tu_push_descriptor_set push_set; 775 bool push_dirty; 776 uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS]; 777 }; 778 779 struct tu_tile 780 { 781 uint8_t pipe; 782 uint8_t slot; 783 VkOffset2D begin; 784 VkOffset2D end; 785 }; 786 787 struct tu_tiling_config 788 { 789 VkRect2D render_area; 790 uint32_t buffer_cpp[MAX_RTS + 2]; 791 uint32_t buffer_count; 792 793 /* position and size of the first tile */ 794 VkRect2D tile0; 795 /* number of tiles */ 796 VkExtent2D tile_count; 797 798 uint32_t gmem_offsets[MAX_RTS + 2]; 799 800 /* size of the first VSC pipe */ 801 VkExtent2D pipe0; 802 /* number of VSC pipes */ 803 VkExtent2D pipe_count; 804 805 /* pipe register values */ 806 uint32_t pipe_config[MAX_VSC_PIPES]; 807 uint32_t pipe_sizes[MAX_VSC_PIPES]; 808 }; 809 810 enum tu_cmd_dirty_bits 811 { 812 TU_CMD_DIRTY_PIPELINE = 1 << 0, 813 TU_CMD_DIRTY_VERTEX_BUFFERS = 1 << 1, 814 815 TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 16, 816 TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 17, 817 TU_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 18, 818 TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 19, 819 }; 820 821 struct tu_cmd_state 822 { 823 uint32_t dirty; 824 825 struct tu_pipeline *pipeline; 826 827 /* Vertex buffers */ 828 struct 829 { 830 struct tu_buffer *buffers[MAX_VBS]; 831 VkDeviceSize offsets[MAX_VBS]; 832 } vb; 833 834 struct tu_dynamic_state dynamic; 835 836 /* Index buffer */ 837 struct tu_buffer *index_buffer; 838 uint64_t index_offset; 839 uint32_t index_type; 840 uint32_t max_index_count; 841 uint64_t index_va; 842 843 const struct tu_render_pass *pass; 844 const struct tu_subpass *subpass; 845 const struct tu_framebuffer *framebuffer; 846 struct tu_attachment_state *attachments; 847 848 struct tu_tiling_config tiling_config; 849 850 struct tu_cs_entry tile_load_ib; 851 struct tu_cs_entry tile_store_ib; 852 }; 853 854 struct tu_cmd_pool 855 { 856 VkAllocationCallbacks alloc; 857 struct list_head cmd_buffers; 858 struct list_head free_cmd_buffers; 859 uint32_t queue_family_index; 860 }; 861 862 struct tu_cmd_buffer_upload 863 { 864 uint8_t *map; 865 unsigned offset; 866 uint64_t size; 867 struct list_head list; 868 }; 869 870 enum tu_cmd_buffer_status 871 { 872 TU_CMD_BUFFER_STATUS_INVALID, 873 TU_CMD_BUFFER_STATUS_INITIAL, 874 TU_CMD_BUFFER_STATUS_RECORDING, 875 TU_CMD_BUFFER_STATUS_EXECUTABLE, 876 TU_CMD_BUFFER_STATUS_PENDING, 877 }; 878 879 struct tu_bo_list 880 { 881 uint32_t count; 882 uint32_t capacity; 883 struct drm_msm_gem_submit_bo *bo_infos; 884 }; 885 886 #define TU_BO_LIST_FAILED (~0) 887 888 void 889 tu_bo_list_init(struct tu_bo_list *list); 890 void 891 tu_bo_list_destroy(struct tu_bo_list *list); 892 void 893 tu_bo_list_reset(struct tu_bo_list *list); 894 uint32_t 895 tu_bo_list_add(struct tu_bo_list *list, 896 const struct tu_bo *bo, 897 uint32_t flags); 898 VkResult 899 tu_bo_list_merge(struct tu_bo_list *list, const struct tu_bo_list *other); 900 901 struct tu_cmd_buffer 902 { 903 VK_LOADER_DATA _loader_data; 904 905 struct tu_device *device; 906 907 struct tu_cmd_pool *pool; 908 struct list_head pool_link; 909 910 VkCommandBufferUsageFlags usage_flags; 911 VkCommandBufferLevel level; 912 enum tu_cmd_buffer_status status; 913 914 struct tu_cmd_state state; 915 struct tu_vertex_binding vertex_bindings[MAX_VBS]; 916 uint32_t queue_family_index; 917 918 uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE]; 919 VkShaderStageFlags push_constant_stages; 920 struct tu_descriptor_set meta_push_descriptors; 921 922 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE]; 923 924 struct tu_cmd_buffer_upload upload; 925 926 VkResult record_result; 927 928 struct tu_bo_list bo_list; 929 struct tu_cs cs; 930 struct tu_cs draw_cs; 931 struct tu_cs tile_cs; 932 933 uint16_t marker_reg; 934 uint32_t marker_seqno; 935 936 struct tu_bo scratch_bo; 937 uint32_t scratch_seqno; 938 939 bool wait_for_idle; 940 }; 941 942 void 943 tu6_emit_event_write(struct tu_cmd_buffer *cmd, 944 struct tu_cs *cs, 945 enum vgt_event_type event, 946 bool need_seqno); 947 948 bool 949 tu_get_memory_fd(struct tu_device *device, 950 struct tu_device_memory *memory, 951 int *pFD); 952 953 /* 954 * Takes x,y,z as exact numbers of invocations, instead of blocks. 955 * 956 * Limitations: Can't call normal dispatch functions without binding or 957 * rebinding 958 * the compute pipeline. 959 */ 960 void 961 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer, 962 uint32_t x, 963 uint32_t y, 964 uint32_t z); 965 966 struct tu_event 967 { 968 uint64_t *map; 969 }; 970 971 struct tu_shader_module; 972 973 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0) 974 #define TU_HASH_SHADER_SISCHED (1 << 1) 975 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2) 976 void 977 tu_hash_shaders(unsigned char *hash, 978 const VkPipelineShaderStageCreateInfo **stages, 979 const struct tu_pipeline_layout *layout, 980 const struct tu_pipeline_key *key, 981 uint32_t flags); 982 983 static inline gl_shader_stage 984 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage) 985 { 986 assert(__builtin_popcount(vk_stage) == 1); 987 return ffs(vk_stage) - 1; 988 } 989 990 static inline VkShaderStageFlagBits 991 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage) 992 { 993 return (1 << mesa_stage); 994 } 995 996 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1) 997 998 #define tu_foreach_stage(stage, stage_bits) \ 999 for (gl_shader_stage stage, \ 1000 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \ 1001 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage))) 1002 1003 struct tu_shader_module 1004 { 1005 unsigned char sha1[20]; 1006 1007 uint32_t code_size; 1008 const uint32_t *code[0]; 1009 }; 1010 1011 struct tu_shader_compile_options 1012 { 1013 struct ir3_shader_key key; 1014 1015 bool optimize; 1016 bool include_binning_pass; 1017 }; 1018 1019 struct tu_shader 1020 { 1021 struct ir3_shader ir3_shader; 1022 1023 /* This may be true for vertex shaders. When true, variants[1] is the 1024 * binning variant and binning_binary is non-NULL. 1025 */ 1026 bool has_binning_pass; 1027 1028 void *binary; 1029 void *binning_binary; 1030 1031 struct ir3_shader_variant variants[0]; 1032 }; 1033 1034 struct tu_shader * 1035 tu_shader_create(struct tu_device *dev, 1036 gl_shader_stage stage, 1037 const VkPipelineShaderStageCreateInfo *stage_info, 1038 const VkAllocationCallbacks *alloc); 1039 1040 void 1041 tu_shader_destroy(struct tu_device *dev, 1042 struct tu_shader *shader, 1043 const VkAllocationCallbacks *alloc); 1044 1045 void 1046 tu_shader_compile_options_init( 1047 struct tu_shader_compile_options *options, 1048 const VkGraphicsPipelineCreateInfo *pipeline_info); 1049 1050 VkResult 1051 tu_shader_compile(struct tu_device *dev, 1052 struct tu_shader *shader, 1053 const struct tu_shader *next_stage, 1054 const struct tu_shader_compile_options *options, 1055 const VkAllocationCallbacks *alloc); 1056 1057 struct tu_pipeline 1058 { 1059 struct tu_cs cs; 1060 1061 struct tu_dynamic_state dynamic_state; 1062 1063 struct tu_pipeline_layout *layout; 1064 1065 bool need_indirect_descriptor_sets; 1066 VkShaderStageFlags active_stages; 1067 1068 struct 1069 { 1070 struct tu_bo binary_bo; 1071 struct tu_cs_entry state_ib; 1072 struct tu_cs_entry binning_state_ib; 1073 } program; 1074 1075 struct 1076 { 1077 uint8_t bindings[MAX_VERTEX_ATTRIBS]; 1078 uint16_t strides[MAX_VERTEX_ATTRIBS]; 1079 uint16_t offsets[MAX_VERTEX_ATTRIBS]; 1080 uint32_t count; 1081 1082 uint8_t binning_bindings[MAX_VERTEX_ATTRIBS]; 1083 uint16_t binning_strides[MAX_VERTEX_ATTRIBS]; 1084 uint16_t binning_offsets[MAX_VERTEX_ATTRIBS]; 1085 uint32_t binning_count; 1086 1087 struct tu_cs_entry state_ib; 1088 struct tu_cs_entry binning_state_ib; 1089 } vi; 1090 1091 struct 1092 { 1093 enum pc_di_primtype primtype; 1094 bool primitive_restart; 1095 } ia; 1096 1097 struct 1098 { 1099 struct tu_cs_entry state_ib; 1100 } vp; 1101 1102 struct 1103 { 1104 uint32_t gras_su_cntl; 1105 struct tu_cs_entry state_ib; 1106 } rast; 1107 1108 struct 1109 { 1110 struct tu_cs_entry state_ib; 1111 } ds; 1112 1113 struct 1114 { 1115 struct tu_cs_entry state_ib; 1116 } blend; 1117 }; 1118 1119 void 1120 tu6_emit_viewport(struct tu_cs *cs, const VkViewport *viewport); 1121 1122 void 1123 tu6_emit_scissor(struct tu_cs *cs, const VkRect2D *scissor); 1124 1125 void 1126 tu6_emit_gras_su_cntl(struct tu_cs *cs, 1127 uint32_t gras_su_cntl, 1128 float line_width); 1129 1130 void 1131 tu6_emit_depth_bias(struct tu_cs *cs, 1132 float constant_factor, 1133 float clamp, 1134 float slope_factor); 1135 1136 void 1137 tu6_emit_stencil_compare_mask(struct tu_cs *cs, 1138 uint32_t front, 1139 uint32_t back); 1140 1141 void 1142 tu6_emit_stencil_write_mask(struct tu_cs *cs, uint32_t front, uint32_t back); 1143 1144 void 1145 tu6_emit_stencil_reference(struct tu_cs *cs, uint32_t front, uint32_t back); 1146 1147 void 1148 tu6_emit_blend_constants(struct tu_cs *cs, const float constants[4]); 1149 1150 struct tu_userdata_info * 1151 tu_lookup_user_sgpr(struct tu_pipeline *pipeline, 1152 gl_shader_stage stage, 1153 int idx); 1154 1155 struct tu_shader_variant * 1156 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage); 1157 1158 struct tu_graphics_pipeline_create_info 1159 { 1160 bool use_rectlist; 1161 bool db_depth_clear; 1162 bool db_stencil_clear; 1163 bool db_depth_disable_expclear; 1164 bool db_stencil_disable_expclear; 1165 bool db_flush_depth_inplace; 1166 bool db_flush_stencil_inplace; 1167 bool db_resummarize; 1168 uint32_t custom_blend_mode; 1169 }; 1170 1171 struct tu_native_format 1172 { 1173 int vtx; /* VFMTn_xxx or -1 */ 1174 int tex; /* TFMTn_xxx or -1 */ 1175 int rb; /* RBn_xxx or -1 */ 1176 int swap; /* enum a3xx_color_swap */ 1177 bool present; /* internal only; always true to external users */ 1178 }; 1179 1180 const struct tu_native_format * 1181 tu6_get_native_format(VkFormat format); 1182 1183 int 1184 tu_pack_clear_value(const VkClearValue *val, 1185 VkFormat format, 1186 uint32_t buf[4]); 1187 enum a6xx_2d_ifmt tu6_rb_fmt_to_ifmt(enum a6xx_color_fmt fmt); 1188 1189 struct tu_image_level 1190 { 1191 VkDeviceSize offset; 1192 VkDeviceSize size; 1193 uint32_t pitch; 1194 }; 1195 1196 struct tu_image 1197 { 1198 VkImageType type; 1199 /* The original VkFormat provided by the client. This may not match any 1200 * of the actual surface formats. 1201 */ 1202 VkFormat vk_format; 1203 VkImageAspectFlags aspects; 1204 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */ 1205 VkImageTiling tiling; /** VkImageCreateInfo::tiling */ 1206 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */ 1207 VkExtent3D extent; 1208 uint32_t level_count; 1209 uint32_t layer_count; 1210 1211 VkDeviceSize size; 1212 uint32_t alignment; 1213 1214 /* memory layout */ 1215 VkDeviceSize layer_size; 1216 struct tu_image_level levels[15]; 1217 unsigned tile_mode; 1218 1219 unsigned queue_family_mask; 1220 bool exclusive; 1221 bool shareable; 1222 1223 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */ 1224 VkDeviceMemory owned_memory; 1225 1226 /* Set when bound */ 1227 const struct tu_bo *bo; 1228 VkDeviceSize bo_offset; 1229 }; 1230 1231 unsigned 1232 tu_image_queue_family_mask(const struct tu_image *image, 1233 uint32_t family, 1234 uint32_t queue_family); 1235 1236 static inline uint32_t 1237 tu_get_layerCount(const struct tu_image *image, 1238 const VkImageSubresourceRange *range) 1239 { 1240 return range->layerCount == VK_REMAINING_ARRAY_LAYERS 1241 ? image->layer_count - range->baseArrayLayer 1242 : range->layerCount; 1243 } 1244 1245 static inline uint32_t 1246 tu_get_levelCount(const struct tu_image *image, 1247 const VkImageSubresourceRange *range) 1248 { 1249 return range->levelCount == VK_REMAINING_MIP_LEVELS 1250 ? image->level_count - range->baseMipLevel 1251 : range->levelCount; 1252 } 1253 1254 struct tu_image_view 1255 { 1256 struct tu_image *image; /**< VkImageViewCreateInfo::image */ 1257 1258 VkImageViewType type; 1259 VkImageAspectFlags aspect_mask; 1260 VkFormat vk_format; 1261 uint32_t base_layer; 1262 uint32_t layer_count; 1263 uint32_t base_mip; 1264 uint32_t level_count; 1265 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */ 1266 1267 uint32_t descriptor[16]; 1268 1269 /* Descriptor for use as a storage image as opposed to a sampled image. 1270 * This has a few differences for cube maps (e.g. type). 1271 */ 1272 uint32_t storage_descriptor[16]; 1273 }; 1274 1275 struct tu_sampler 1276 { 1277 }; 1278 1279 struct tu_image_create_info 1280 { 1281 const VkImageCreateInfo *vk_info; 1282 bool scanout; 1283 bool no_metadata_planes; 1284 }; 1285 1286 VkResult 1287 tu_image_create(VkDevice _device, 1288 const struct tu_image_create_info *info, 1289 const VkAllocationCallbacks *alloc, 1290 VkImage *pImage); 1291 1292 VkResult 1293 tu_image_from_gralloc(VkDevice device_h, 1294 const VkImageCreateInfo *base_info, 1295 const VkNativeBufferANDROID *gralloc_info, 1296 const VkAllocationCallbacks *alloc, 1297 VkImage *out_image_h); 1298 1299 void 1300 tu_image_view_init(struct tu_image_view *view, 1301 struct tu_device *device, 1302 const VkImageViewCreateInfo *pCreateInfo); 1303 1304 struct tu_buffer_view 1305 { 1306 VkFormat vk_format; 1307 uint64_t range; /**< VkBufferViewCreateInfo::range */ 1308 uint32_t state[4]; 1309 }; 1310 void 1311 tu_buffer_view_init(struct tu_buffer_view *view, 1312 struct tu_device *device, 1313 const VkBufferViewCreateInfo *pCreateInfo); 1314 1315 static inline struct VkExtent3D 1316 tu_sanitize_image_extent(const VkImageType imageType, 1317 const struct VkExtent3D imageExtent) 1318 { 1319 switch (imageType) { 1320 case VK_IMAGE_TYPE_1D: 1321 return (VkExtent3D) { imageExtent.width, 1, 1 }; 1322 case VK_IMAGE_TYPE_2D: 1323 return (VkExtent3D) { imageExtent.width, imageExtent.height, 1 }; 1324 case VK_IMAGE_TYPE_3D: 1325 return imageExtent; 1326 default: 1327 unreachable("invalid image type"); 1328 } 1329 } 1330 1331 static inline struct VkOffset3D 1332 tu_sanitize_image_offset(const VkImageType imageType, 1333 const struct VkOffset3D imageOffset) 1334 { 1335 switch (imageType) { 1336 case VK_IMAGE_TYPE_1D: 1337 return (VkOffset3D) { imageOffset.x, 0, 0 }; 1338 case VK_IMAGE_TYPE_2D: 1339 return (VkOffset3D) { imageOffset.x, imageOffset.y, 0 }; 1340 case VK_IMAGE_TYPE_3D: 1341 return imageOffset; 1342 default: 1343 unreachable("invalid image type"); 1344 } 1345 } 1346 1347 struct tu_attachment_info 1348 { 1349 struct tu_image_view *attachment; 1350 }; 1351 1352 struct tu_framebuffer 1353 { 1354 uint32_t width; 1355 uint32_t height; 1356 uint32_t layers; 1357 1358 uint32_t attachment_count; 1359 struct tu_attachment_info attachments[0]; 1360 }; 1361 1362 struct tu_subpass_barrier 1363 { 1364 VkPipelineStageFlags src_stage_mask; 1365 VkAccessFlags src_access_mask; 1366 VkAccessFlags dst_access_mask; 1367 }; 1368 1369 void 1370 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer, 1371 const struct tu_subpass_barrier *barrier); 1372 1373 struct tu_subpass_attachment 1374 { 1375 uint32_t attachment; 1376 VkImageLayout layout; 1377 }; 1378 1379 struct tu_subpass 1380 { 1381 uint32_t input_count; 1382 uint32_t color_count; 1383 struct tu_subpass_attachment *input_attachments; 1384 struct tu_subpass_attachment *color_attachments; 1385 struct tu_subpass_attachment *resolve_attachments; 1386 struct tu_subpass_attachment depth_stencil_attachment; 1387 1388 /** Subpass has at least one resolve attachment */ 1389 bool has_resolve; 1390 1391 struct tu_subpass_barrier start_barrier; 1392 1393 uint32_t view_mask; 1394 VkSampleCountFlagBits max_sample_count; 1395 }; 1396 1397 struct tu_render_pass_attachment 1398 { 1399 VkFormat format; 1400 uint32_t samples; 1401 VkAttachmentLoadOp load_op; 1402 VkAttachmentLoadOp stencil_load_op; 1403 VkImageLayout initial_layout; 1404 VkImageLayout final_layout; 1405 uint32_t view_mask; 1406 }; 1407 1408 struct tu_render_pass 1409 { 1410 uint32_t attachment_count; 1411 uint32_t subpass_count; 1412 struct tu_subpass_attachment *subpass_attachments; 1413 struct tu_render_pass_attachment *attachments; 1414 struct tu_subpass_barrier end_barrier; 1415 struct tu_subpass subpasses[0]; 1416 }; 1417 1418 VkResult 1419 tu_device_init_meta(struct tu_device *device); 1420 void 1421 tu_device_finish_meta(struct tu_device *device); 1422 1423 struct tu_query_pool 1424 { 1425 uint32_t stride; 1426 uint32_t availability_offset; 1427 uint64_t size; 1428 char *ptr; 1429 VkQueryType type; 1430 uint32_t pipeline_stats_mask; 1431 }; 1432 1433 struct tu_semaphore 1434 { 1435 uint32_t syncobj; 1436 uint32_t temp_syncobj; 1437 }; 1438 1439 void 1440 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer, 1441 VkPipelineBindPoint bind_point, 1442 struct tu_descriptor_set *set, 1443 unsigned idx); 1444 1445 void 1446 tu_update_descriptor_sets(struct tu_device *device, 1447 struct tu_cmd_buffer *cmd_buffer, 1448 VkDescriptorSet overrideSet, 1449 uint32_t descriptorWriteCount, 1450 const VkWriteDescriptorSet *pDescriptorWrites, 1451 uint32_t descriptorCopyCount, 1452 const VkCopyDescriptorSet *pDescriptorCopies); 1453 1454 void 1455 tu_update_descriptor_set_with_template( 1456 struct tu_device *device, 1457 struct tu_cmd_buffer *cmd_buffer, 1458 struct tu_descriptor_set *set, 1459 VkDescriptorUpdateTemplate descriptorUpdateTemplate, 1460 const void *pData); 1461 1462 void 1463 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer, 1464 VkPipelineBindPoint pipelineBindPoint, 1465 VkPipelineLayout _layout, 1466 uint32_t set, 1467 uint32_t descriptorWriteCount, 1468 const VkWriteDescriptorSet *pDescriptorWrites); 1469 1470 int 1471 tu_drm_get_gpu_id(const struct tu_physical_device *dev, uint32_t *id); 1472 1473 int 1474 tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size); 1475 1476 int 1477 tu_drm_submitqueue_new(const struct tu_device *dev, 1478 int priority, 1479 uint32_t *queue_id); 1480 1481 void 1482 tu_drm_submitqueue_close(const struct tu_device *dev, uint32_t queue_id); 1483 1484 uint32_t 1485 tu_gem_new(const struct tu_device *dev, uint64_t size, uint32_t flags); 1486 uint32_t 1487 tu_gem_import_dmabuf(const struct tu_device *dev, 1488 int prime_fd, 1489 uint64_t size); 1490 int 1491 tu_gem_export_dmabuf(const struct tu_device *dev, uint32_t gem_handle); 1492 void 1493 tu_gem_close(const struct tu_device *dev, uint32_t gem_handle); 1494 uint64_t 1495 tu_gem_info_offset(const struct tu_device *dev, uint32_t gem_handle); 1496 uint64_t 1497 tu_gem_info_iova(const struct tu_device *dev, uint32_t gem_handle); 1498 1499 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \ 1500 \ 1501 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \ 1502 { \ 1503 return (struct __tu_type *) _handle; \ 1504 } \ 1505 \ 1506 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \ 1507 { \ 1508 return (__VkType) _obj; \ 1509 } 1510 1511 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \ 1512 \ 1513 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \ 1514 { \ 1515 return (struct __tu_type *) (uintptr_t) _handle; \ 1516 } \ 1517 \ 1518 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \ 1519 { \ 1520 return (__VkType)(uintptr_t) _obj; \ 1521 } 1522 1523 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \ 1524 struct __tu_type *__name = __tu_type##_from_handle(__handle) 1525 1526 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer) 1527 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice) 1528 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance) 1529 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice) 1530 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue) 1531 1532 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool) 1533 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer) 1534 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView) 1535 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool) 1536 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet) 1537 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout, 1538 VkDescriptorSetLayout) 1539 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template, 1540 VkDescriptorUpdateTemplate) 1541 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory) 1542 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence) 1543 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent) 1544 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer) 1545 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage) 1546 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView); 1547 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache) 1548 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline) 1549 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout) 1550 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool) 1551 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass) 1552 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler) 1553 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule) 1554 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore) 1555 1556 #endif /* TU_PRIVATE_H */ 1557
Indexes created Sat Aug 01 00:24:56 UTC 2026