1 /* $NetBSD: octeon_bootbus.c,v 1.3 2021/08/07 16:18:59 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2007 5 * Internet Initiative Japan, Inc. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: octeon_bootbus.c,v 1.3 2021/08/07 16:18:59 thorpej Exp $"); 31 32 #include "locators.h" 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 38 #define _MIPS_BUS_DMA_PRIVATE 39 #include <sys/bus.h> 40 41 #include <mips/cavium/octeonvar.h> 42 #include <mips/cavium/include/bootbusvar.h> 43 44 static int bootbus_match(device_t, struct cfdata *, void *); 45 static void bootbus_attach(device_t, device_t, void *); 46 static int bootbus_submatch(device_t, struct cfdata *, 47 const int *, void *); 48 static int bootbus_print(void *, const char *); 49 static void bootbus_init(void); 50 51 static void bootbus_bus_io_init(bus_space_tag_t, void *); 52 53 static struct mips_bus_space *bootbus_bust; 54 static struct mips_bus_dma_tag *bootbus_dmat; 55 56 void 57 bootbus_bootstrap(struct octeon_config *mcp) 58 { 59 60 bootbus_bus_io_init(&mcp->mc_bootbus_bust, mcp); 61 62 bootbus_bust = &mcp->mc_bootbus_bust; 63 bootbus_dmat = &mcp->mc_bootbus_dmat; 64 } 65 66 /* ---- autoconf */ 67 68 CFATTACH_DECL_NEW(bootbus, sizeof(device_t), bootbus_match, bootbus_attach, NULL, 69 NULL); 70 71 static int 72 bootbus_match(device_t parent, struct cfdata *match, void *aux) 73 { 74 75 return 1; 76 } 77 78 static void 79 bootbus_attach(device_t parent, device_t self, void *aux) 80 { 81 const struct bootbus_dev *dev; 82 struct bootbus_attach_args aa; 83 int i, j; 84 85 aprint_normal("\n"); 86 87 bootbus_init(); 88 89 for (i = 0; i < (int)bootbus_ndevs; i++) { 90 dev = bootbus_devs[i]; 91 for (j = 0; j < dev->nunits; j++) { 92 aa.aa_name = dev->name; 93 aa.aa_unitno = j; 94 aa.aa_unit = &dev->units[j]; 95 aa.aa_bust = bootbus_bust; 96 aa.aa_dmat = bootbus_dmat; 97 98 config_found(self, &aa, bootbus_print, 99 CFARGS(.submatch = bootbus_submatch)); 100 } 101 } 102 } 103 104 static int 105 bootbus_submatch(device_t parent, struct cfdata *cf, 106 const int *ldesc, void *aux) 107 { 108 109 return config_match(parent, cf, aux); 110 } 111 112 static int 113 bootbus_print(void *aux, const char *pnp) 114 { 115 struct bootbus_attach_args *aa = aux; 116 117 if (pnp) 118 aprint_normal("%s at %s", aa->aa_name, pnp); 119 120 aprint_normal(": address=0x%016" PRIx64, aa->aa_unit->addr); 121 122 return UNCONF; 123 } 124 125 static void 126 bootbus_init(void) 127 { 128 129 } 130 131 132 /* ---- bus_space(9) */ 133 134 #define CHIP bootbus 135 #define CHIP_IO 136 #define CHIP_ACCESS_SIZE 8 137 138 #define CHIP_W1_BUS_START(v) 0x0000000000000000ULL 139 #define CHIP_W1_BUS_END(v) 0x000000001fffffffULL 140 #define CHIP_W1_SYS_START(v) 0x00000000a0000000ULL 141 #define CHIP_W1_SYS_END(v) 0x00000000bfffffffULL 142 143 #include <mips/mips/bus_space_alignstride_chipdep.c> 144