| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/ |
| amdgpu_rc_calc_dpi.c | 112 enum bits_per_comp bpc = (pps->bits_per_component == 8) ? BPC_8 : local in function:dscc_compute_dsc_parameters
135 calc_rc_params(&rc, mode, bpc, bpp, slice_width, slice_height, pps->dsc_version_minor);
|
| amdgpu_dc_dsc.c | 932 uint32_t bpc = 0; local in function:dc_dsc_get_policy_for_timing
955 bpc = 8;
958 bpc = 10;
961 bpc = 12;
972 /* DP specs limits to 3 x bpc */
973 policy->max_target_bpp = 3 * bpc;
978 /* DP specs limits to 1.5 x bpc assume bpc is an even number */
979 policy->max_target_bpp = bpc * 3 / 2;
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_evergreen_hdmi.c | 77 int bpc = 8; local in function:evergreen_hdmi_update_acr
81 bpc = radeon_crtc->bpc;
84 if (bpc > 8)
322 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, u32 offset, int bpc)
333 switch (bpc) {
339 DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n",
340 connector->name, bpc);
345 DRM_DEBUG("%s: Enabling hdmi deep color 30 for 10 bpc.\n",
351 DRM_DEBUG("%s: Enabling hdmi deep color 36 for 12 bpc.\n"
[all...] |
| radeon_audio.c | 96 u32 offset, int bpc);
654 int bpc = 8; local in function:radeon_hdmi_set_color_depth
663 bpc = radeon_crtc->bpc;
667 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
|
| radeon_connectors.c | 131 int bpc = 8; local in function:radeon_get_monitor_bpc
139 if (connector->display_info.bpc)
140 bpc = connector->display_info.bpc;
147 if (connector->display_info.bpc)
148 bpc = connector->display_info.bpc;
156 if (connector->display_info.bpc)
157 bpc = connector->display_info.bpc;
[all...] |
| radeon_rs600.c | 169 int bpc = 0; local in function:avivo_program_fmt
175 bpc = radeon_get_monitor_bpc(connector);
183 if (bpc == 0)
186 switch (bpc) {
|
| radeon_atombios_crtc.c | 576 int bpc = radeon_crtc->bpc; local in function:atombios_adjust_pll
663 switch (bpc) {
838 int bpc,
906 switch (bpc) {
935 switch (bpc) {
977 radeon_crtc->bpc = 8;
995 radeon_crtc->bpc = radeon_get_monitor_bpc(connector);
1084 (radeon_crtc->bpc > 8))
1123 radeon_crtc->bpc, radeon_crtc->ss_enabled, &radeon_crtc->ss)
[all...] |
| radeon_atombios_encoders.c | 466 int bpc = 8; local in function:radeon_atom_get_bpc
470 bpc = radeon_crtc->bpc;
473 switch (bpc) {
|
| radeon_r600.c | 310 int bpc = 0; local in function:dce3_program_fmt
316 bpc = radeon_get_monitor_bpc(connector);
329 if (bpc == 0)
332 switch (bpc) {
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_atombios_crtc.c | 324 int bpc = amdgpu_crtc->bpc; local in function:amdgpu_atombios_crtc_adjust_pll
365 switch (bpc) {
592 int bpc,
661 switch (bpc) {
692 switch (bpc) {
720 switch (bpc) {
763 amdgpu_crtc->bpc = 8;
779 amdgpu_crtc->bpc = amdgpu_connector_get_monitor_bpc(connector);
838 (amdgpu_crtc->bpc > 8)
[all...] |
| amdgpu_atombios_encoders.c | 356 int bpc = 8; local in function:amdgpu_atombios_encoder_get_bpc
360 bpc = amdgpu_crtc->bpc;
363 switch (bpc) {
|
| amdgpu_connectors.c | 108 int bpc = 8; local in function:amdgpu_connector_get_monitor_bpc
116 if (connector->display_info.bpc)
117 bpc = connector->display_info.bpc;
124 if (connector->display_info.bpc)
125 bpc = connector->display_info.bpc;
133 if (connector->display_info.bpc)
134 bpc = connector->display_info.bpc;
[all...] |
| amdgpu_dce_v10_0.c | 516 int bpc = 0; local in function:dce_v10_0_program_fmt
522 bpc = amdgpu_connector_get_monitor_bpc(connector);
535 if (bpc == 0)
538 switch (bpc) {
1585 int bpc = 8; local in function:dce_v10_0_afmt_setmode
1594 /* hdmi deep color mode general control packets setup, if bpc > 8 */
1597 bpc = amdgpu_crtc->bpc;
1613 switch (bpc) {
1621 DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n"
[all...] |
| amdgpu_dce_v11_0.c | 542 int bpc = 0; local in function:dce_v11_0_program_fmt
548 bpc = amdgpu_connector_get_monitor_bpc(connector);
561 if (bpc == 0)
564 switch (bpc) {
1627 int bpc = 8; local in function:dce_v11_0_afmt_setmode
1636 /* hdmi deep color mode general control packets setup, if bpc > 8 */
1639 bpc = amdgpu_crtc->bpc;
1655 switch (bpc) {
1663 DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n"
[all...] |
| amdgpu_dce_v6_0.c | 413 int bpc = 0; local in function:dce_v6_0_program_fmt
419 bpc = amdgpu_connector_get_monitor_bpc(connector);
427 if (bpc == 0)
431 switch (bpc) {
1413 uint32_t clock, int bpc)
1425 bpc > 8 ? 0 : 1);
1660 int bpc = 8; local in function:dce_v6_0_afmt_setmode
1688 bpc = amdgpu_crtc->bpc;
1701 dce_v6_0_audio_set_acr(encoder, mode->clock, bpc);
[all...] |
| amdgpu_dce_v8_0.c | 456 int bpc = 0; local in function:dce_v8_0_program_fmt
462 bpc = amdgpu_connector_get_monitor_bpc(connector);
475 if (bpc == 0)
478 switch (bpc) {
1532 int bpc = 8; local in function:dce_v8_0_afmt_setmode
1543 /* hdmi deep color mode general control packets setup, if bpc > 8 */
1546 bpc = amdgpu_crtc->bpc;
1564 switch (bpc) {
1570 DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n"
[all...] |
| amdgpu_mode.h | 414 int bpc; member in struct:amdgpu_crtc
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_dsc.c | 451 enum dsc_bits_per_comp bpc = DSC_BPC_UNKNOWN; local in function:dsc_dc_color_depth_to_dsc_bits_per_comp
455 bpc = DSC_BPC_8;
458 bpc = DSC_BPC_10;
461 bpc = DSC_BPC_12;
464 bpc = DSC_BPC_UNKNOWN;
468 return bpc;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| amdgpu_dm_debugfs.c | 684 * Returns the current and maximum output bpc for the connector.
694 unsigned int bpc; local in function:output_bpc_show
716 bpc = 6;
719 bpc = 8;
722 bpc = 10;
725 bpc = 12;
728 bpc = 16;
734 seq_printf(m, "Current: %u\n", bpc);
735 seq_printf(m, "Maximum: %u\n", connector->display_info.bpc);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv50/ |
| atom.h | 124 u8 bpc; member in struct:nv50_head_atom::__anonf635598f0d08
|
| /src/sys/external/bsd/drm2/dist/drm/ |
| drm_dp_helper.c | 418 * Returns max bpc on success or 0 if max bpc not defined
426 int bpc; local in function:drm_dp_downstream_max_bpc
436 bpc = port_cap[2] & DP_DS_MAX_BPC_MASK;
438 switch (bpc) {
484 int bpc; local in function:drm_dp_downstream_debug
547 bpc = drm_dp_downstream_max_bpc(dpcd, port_cap);
549 if (bpc > 0)
550 seq_printf(m, "\t\tMax bpc: %d\n", bpc);
[all...] |
| /src/sys/nfs/ |
| nfs_bootdhcp.c | 324 struct bootpcontext *bpc = context; local in function:bootpcheck
359 if (bootp->bp_hlen != bpc->halen) {
361 bpc->halen));
364 if (memcmp(bootp->bp_chaddr, bpc->haddr, bpc->halen)) {
368 bp_chaddr = malloc(3 * bpc->halen, M_TEMP, M_WAITOK);
369 haddr = malloc(3 * bpc->halen, M_TEMP, M_WAITOK);
372 ether_snprintf(bp_chaddr, 3 * bpc->halen,
374 ether_snprintf(haddr, 3 * bpc->halen, bpc->haddr)))
494 struct bootpcontext bpc; local in function:bootpc_call
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_bios.c | 2426 int bpc = 8; local in function:fill_dsc
2432 bpc = 12;
2434 bpc = 10;
2436 bpc = 8;
2438 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2441 crtc_state->pipe_bpp = bpc * 3;
2482 /* FIXME: DSI spec says bpc + 1 for this one */
|
| intel_hdmi.c | 955 /* phase information not relevant for 8bpc */
1925 * for 12bpc with pixel repeat.
1969 * The procedure for 12bpc is as follows:
1971 * 2. enable HDMI with 8bpc
1972 * 3. enable HDMI with 12bpc
2195 /* check if we can do 8bpc */
2199 /* if we can't do 8bpc we may still be able to do 12bpc */
2204 /* if we can't do 8,12bpc we may still be able to do 10bpc */
2326 int bpc; local in function:intel_hdmi_compute_bpc
2346 int bpc, clock = adjusted_mode->crtc_clock; local in function:intel_hdmi_compute_clock
[all...] |
| /src/sys/external/bsd/drm2/dist/include/drm/ |
| drm_connector.h | 379 * @bpc: Maximum bits per color channel. Used by HDMI and DP outputs.
381 unsigned int bpc; member in struct:drm_display_info
657 * and the connector bpc limitations obtained from edid.
1255 * @max_bpc_property: Default connector property for the max bpc to be
|
