1 /* $NetBSD: cpuctl_i386.h,v 1.6 2021/10/07 13:04:18 msaitoh Exp $ */ 2 3 #include <machine/specialreg.h> 4 #include <x86/cputypes.h> 5 #include <x86/cacheinfo.h> 6 7 struct cpu_info { 8 const char *ci_dev; 9 int32_t ci_cpu_type; /* for cpu's without cpuid */ 10 uint32_t ci_signature; /* X86 cpuid type */ 11 uint32_t ci_vendor[4]; /* vendor string */ 12 int32_t ci_max_cpuid; /* highest cpuid supported */ 13 uint32_t ci_max_ext_cpuid; /* highest cpuid extended func lv */ 14 uint32_t ci_family; /* from ci_signature */ 15 uint32_t ci_model; /* from ci_signature */ 16 uint32_t ci_feat_val[10]; /* X86 CPUID feature bits 17 * [0] basic features %edx 18 * [1] basic features %ecx 19 * [2] extended features %edx 20 * [3] extended features %ecx 21 * [4] VIA padlock features 22 * [5] structure ext. feat. %ebx 23 * [6] structure ext. feat. %ecx 24 * [7] structure ext. feat. %edx 25 * [8] XCR0 bits (d:0 %eax) 26 * [9] xsave flags (d:1 %eax) 27 */ 28 uint32_t ci_cpu_class; /* CPU class */ 29 uint32_t ci_brand_id; /* Intel brand id */ 30 uint32_t ci_cpu_serial[3]; /* PIII serial number */ 31 uint64_t ci_tsc_freq; /* cpu cycles/second */ 32 uint8_t ci_packageid; 33 uint8_t ci_coreid; 34 uint8_t ci_smtid; 35 uint32_t ci_initapicid; /* our initial APIC ID */ 36 37 uint32_t ci_cur_xsave; 38 uint32_t ci_max_xsave; 39 40 struct x86_cache_info ci_cinfo[CAI_COUNT]; 41 void (*ci_info)(struct cpu_info *); 42 }; 43 44 extern int cpu_vendor; 45 46 /* For x86/x86/identcpu_subr.c */ 47 uint64_t cpu_tsc_freq_cpuid(struct cpu_info *); 48 void cpu_dcp_cacheinfo(struct cpu_info *, uint32_t); 49 50 /* Interfaces to code in i386-asm.S */ 51 52 #define x86_cpuid(a,b) x86_cpuid2((a),0,(b)) 53 54 void x86_cpuid2(uint32_t, uint32_t, uint32_t *); 55 uint32_t x86_identify(void); 56 uint32_t x86_xgetbv(void); 57
Indexes created Sun Sep 21 18:09:52 GMT 2025