| /xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/ |
| anv_cmd_buffer.c | 781 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); local
782 const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
785 if (cs_prog_data->push.total.size == 0)
791 ALIGN(cs_prog_data->push.total.size, push_constant_alignment);
800 if (cs_prog_data->push.cross_thread.size > 0) {
802 i < cs_prog_data->push.cross_thread.dwords;
810 if (cs_prog_data->push.per_thread.size > 0) {
811 for (unsigned t = 0; t < cs_prog_data->threads; t++) {
813 8 * (cs_prog_data->push.per_thread.regs * t +
814 cs_prog_data->push.cross_thread.regs)
[all...] |
| genX_pipeline.c | 2050 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); local
2052 anv_pipeline_setup_l3_config(pipeline, cs_prog_data->base.total_shared > 0);
2054 uint32_t group_size = cs_prog_data->local_size[0] *
2055 cs_prog_data->local_size[1] * cs_prog_data->local_size[2];
2056 uint32_t remainder = group_size & (cs_prog_data->simd_size - 1);
2061 pipeline->cs_right_mask = ~0u >> (32 - cs_prog_data->simd_size);
2064 ALIGN(cs_prog_data->push.per_thread.regs * cs_prog_data->threads +
2065 cs_prog_data->push.cross_thread.regs, 2)
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/intel/blorp/ |
| blorp_genX_exec.h | 2020 const struct brw_cs_prog_data *cs_prog_data = params->cs_prog_data; local
2022 ALIGN(brw_cs_push_const_total_size(cs_prog_data, threads), 64);
2023 assert(cs_prog_data->push.cross_thread.size +
2024 cs_prog_data->push.per_thread.size == sizeof(params->wm_inputs));
2044 if (cs_prog_data->push.cross_thread.size > 0) {
2045 memcpy(dst, src, cs_prog_data->push.cross_thread.size);
2046 dst += cs_prog_data->push.cross_thread.size;
2047 src += cs_prog_data->push.cross_thread.size;
2050 assert(GFX_VERx10 < 125 || cs_prog_data->push.per_thread.size == 0)
2078 const struct brw_cs_prog_data *cs_prog_data = params->cs_prog_data; local
[all...] |
| blorp_priv.h | 236 struct brw_cs_prog_data *cs_prog_data; member in struct:blorp_params
454 struct brw_cs_prog_data *cs_prog_data);
|
| /xsrc/external/mit/MesaLib/dist/src/intel/vulkan/ |
| anv_cmd_buffer.c | 1174 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); local
1178 brw_cs_get_dispatch_info(devinfo, cs_prog_data, NULL);
1180 brw_cs_push_const_total_size(cs_prog_data, dispatch.threads);
1202 if (cs_prog_data->push.cross_thread.size > 0) {
1203 memcpy(dst, src, cs_prog_data->push.cross_thread.size);
1204 dst += cs_prog_data->push.cross_thread.size;
1205 src += cs_prog_data->push.cross_thread.size;
1208 if (cs_prog_data->push.per_thread.size > 0) {
1210 memcpy(dst, src, cs_prog_data->push.per_thread.size);
1214 (range->start * 32 + cs_prog_data->push.cross_thread.size)
[all...] |
| genX_pipeline.c | 2619 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); local
2620 anv_pipeline_setup_l3_config(&pipeline->base, cs_prog_data->base.total_shared > 0);
2640 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); local
2642 anv_pipeline_setup_l3_config(&pipeline->base, cs_prog_data->base.total_shared > 0);
2645 brw_cs_get_dispatch_info(devinfo, cs_prog_data, NULL);
2647 ALIGN(cs_prog_data->push.per_thread.regs * dispatch.threads +
2648 cs_prog_data->push.cross_thread.regs, 2);
2698 brw_cs_prog_data_prog_offset(cs_prog_data, dispatch.simd_size),
2706 .BarrierEnable = cs_prog_data->uses_barrier,
2708 encode_slm_size(GFX_VER, cs_prog_data->base.total_shared)
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/ |
| brw_wm_surface_state.c | 1672 const struct brw_cs_prog_data *cs_prog_data = local
1675 if (prog && cs_prog_data->uses_num_work_groups) {
1677 cs_prog_data->binding_table.work_groups_start;
|
| genX_state_upload.c | 4205 struct brw_cs_prog_data *cs_prog_data = local
4209 brw_upload_cs_push_constants(brw, cp, cs_prog_data, stage_state);
4270 struct brw_cs_prog_data *cs_prog_data = brw_cs_prog_data(prog_data); local
4274 brw_cs_get_dispatch_info(devinfo, cs_prog_data, brw->compute.group_size);
4359 ALIGN(cs_prog_data->push.per_thread.regs * dispatch.threads +
4360 cs_prog_data->push.cross_thread.regs, 2);
4365 brw_cs_push_const_total_size(cs_prog_data, dispatch.threads);
4377 brw_cs_prog_data_prog_offset(cs_prog_data,
4386 .ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs,
4390 .BarrierEnable = cs_prog_data->uses_barrier
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/ |
| iris_program.c | 1316 struct brw_cs_prog_data *cs_prog_data = local
1318 struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
1325 cs_prog_data->binding_table.work_groups_start = 0;
1337 brw_compile_cs(compiler, &ice->dbg, mem_ctx, key, cs_prog_data,
1387 iris_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data,
1390 assert(cs_prog_data->push.total.size > 0);
1391 assert(cs_prog_data->push.cross_thread.size == 0);
1392 assert(cs_prog_data->push.per_thread.dwords == 1);
1393 assert(cs_prog_data->base.param[0] == BRW_PARAM_BUILTIN_SUBGROUP_ID);
1394 for (unsigned t = 0; t < cs_prog_data->threads; t++
[all...] |
| iris_state.c | 3829 struct brw_cs_prog_data *cs_prog_data = (void *) shader->prog_data; local
3834 desc.ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs;
3835 desc.NumberofThreadsinGPGPUThreadGroup = cs_prog_data->threads;
3838 desc.BarrierEnable = cs_prog_data->uses_barrier;
3840 cs_prog_data->push.cross_thread.regs;
5433 struct brw_cs_prog_data *cs_prog_data = (void *) prog_data; local
5490 ALIGN(cs_prog_data->push.per_thread.regs * cs_prog_data->threads +
5491 cs_prog_data->push.cross_thread.regs, 2);
5497 assert(cs_prog_data->push.cross_thread.dwords == 0 &
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/ |
| brw_wm_surface_state.c | 1660 const struct brw_cs_prog_data *cs_prog_data = local
1663 if (prog && cs_prog_data->uses_num_work_groups) {
1665 cs_prog_data->binding_table.work_groups_start;
|
| genX_state_upload.c | 4278 struct brw_cs_prog_data *cs_prog_data = local
4282 brw_upload_cs_push_constants(brw, cp, cs_prog_data, stage_state);
4343 struct brw_cs_prog_data *cs_prog_data = brw_cs_prog_data(prog_data); local
4436 ALIGN(cs_prog_data->push.per_thread.regs * cs_prog_data->threads +
4437 cs_prog_data->push.cross_thread.regs, 2);
4441 if (cs_prog_data->push.total.size > 0) {
4444 ALIGN(cs_prog_data->push.total.size, 64);
4457 .ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs,
4458 .NumberofThreadsinGPGPUThreadGroup = cs_prog_data->threads
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/ |
| crocus_program.c | 2519 struct brw_cs_prog_data *cs_prog_data = local
2521 struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
2541 .prog_data = cs_prog_data,
2562 prog_data, sizeof(*cs_prog_data), NULL,
2619 crocus_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data,
2623 assert(brw_cs_push_const_total_size(cs_prog_data, threads) > 0);
2624 assert(cs_prog_data->push.cross_thread.size == 0);
2625 assert(cs_prog_data->push.per_thread.dwords == 1);
2626 assert(cs_prog_data->base.param[0] == BRW_PARAM_BUILTIN_SUBGROUP_ID);
|
| crocus_state.c | 8050 struct brw_cs_prog_data *cs_prog_data = (void *) prog_data; local
8052 brw_cs_get_dispatch_info(devinfo, cs_prog_data, grid->block);
8070 cs_prog_data->local_size[0] == 0 /* Variable local group size */) {
8122 ALIGN(cs_prog_data->push.per_thread.regs * dispatch.threads +
8123 cs_prog_data->push.cross_thread.regs, 2);
8129 cs_prog_data->local_size[0] == 0 /* Variable local group size */) {
8131 assert(cs_prog_data->push.cross_thread.dwords == 0 &&
8132 cs_prog_data->push.per_thread.dwords == 1 &&
8133 cs_prog_data->base.param[0] == BRW_PARAM_BUILTIN_SUBGROUP_ID);
8135 brw_cs_push_const_total_size(cs_prog_data, dispatch.threads)
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/ |
| iris_program.c | 2231 struct brw_cs_prog_data *cs_prog_data = local
2233 struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
2257 .prog_data = cs_prog_data,
2334 iris_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data,
2338 assert(brw_cs_push_const_total_size(cs_prog_data, threads) > 0);
2339 assert(cs_prog_data->push.cross_thread.size == 0);
2340 assert(cs_prog_data->push.per_thread.dwords == 1);
2341 assert(cs_prog_data->base.param[0] == BRW_PARAM_BUILTIN_SUBGROUP_ID);
|
| iris_state.c | 4569 struct brw_cs_prog_data *cs_prog_data = (void *) shader->prog_data; local
4574 desc.ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs;
4576 cs_prog_data->push.cross_thread.regs;
4578 assert(cs_prog_data->push.per_thread.regs == 0);
4579 assert(cs_prog_data->push.cross_thread.regs == 0);
4581 desc.BarrierEnable = cs_prog_data->uses_barrier;
6917 struct brw_cs_prog_data *cs_prog_data = (void *) prog_data; local
6919 brw_cs_get_dispatch_info(devinfo, cs_prog_data, grid->block);
6951 .NumberOfBarriers = cs_prog_data->uses_barrier,
6956 assert(brw_cs_push_const_total_size(cs_prog_data, dispatch.threads) == 0)
6978 struct brw_cs_prog_data *cs_prog_data = (void *) prog_data; local
[all...] |
