Home | History | Annotate | Line # | Download | only in radeon 
      1 /*	$NetBSD: trinity_dpm.h,v 1.3 2021/12/18 23:45:43 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2012 Advanced Micro Devices, Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  */
     25 #ifndef __TRINITY_DPM_H__
     26 #define __TRINITY_DPM_H__
     27 
     28 #include "sumo_dpm.h"
     29 
     30 #define TRINITY_SIZEOF_DPM_STATE_TABLE (SMU_SCLK_DPM_STATE_1_CNTL_0 - SMU_SCLK_DPM_STATE_0_CNTL_0)
     31 
     32 struct trinity_pl {
     33 	u32 sclk;
     34 	u8 vddc_index;
     35 	u8 ds_divider_index;
     36 	u8 ss_divider_index;
     37 	u8 allow_gnb_slow;
     38 	u8 force_nbp_state;
     39 	u8 display_wm;
     40 	u8 vce_wm;
     41 };
     42 
     43 #define TRINITY_POWERSTATE_FLAGS_NBPS_FORCEHIGH  (1 << 0)
     44 #define TRINITY_POWERSTATE_FLAGS_NBPS_LOCKTOHIGH (1 << 1)
     45 #define TRINITY_POWERSTATE_FLAGS_NBPS_LOCKTOLOW  (1 << 2)
     46 
     47 #define TRINITY_POWERSTATE_FLAGS_BAPM_DISABLE    (1 << 0)
     48 
     49 struct trinity_ps {
     50 	u32 num_levels;
     51 	struct trinity_pl levels[SUMO_MAX_HARDWARE_POWERLEVELS];
     52 
     53 	u32 nbps_flags;
     54 	u32 bapm_flags;
     55 
     56 	u8 Dpm0PgNbPsLo;
     57 	u8 Dpm0PgNbPsHi;
     58 	u8 DpmXNbPsLo;
     59 	u8 DpmXNbPsHi;
     60 
     61 	u32 vclk_low_divider;
     62 	u32 vclk_high_divider;
     63 	u32 dclk_low_divider;
     64 	u32 dclk_high_divider;
     65 };
     66 
     67 #define TRINITY_NUM_NBPSTATES   4
     68 
     69 struct trinity_uvd_clock_table_entry
     70 {
     71 	u32 vclk;
     72 	u32 dclk;
     73 	u8 vclk_did;
     74 	u8 dclk_did;
     75 	u8 rsv[2];
     76 };
     77 
     78 struct trinity_sys_info {
     79 	u32 bootup_uma_clk;
     80 	u32 bootup_sclk;
     81 	u32 min_sclk;
     82 	u32 dentist_vco_freq;
     83 	u32 nb_dpm_enable;
     84 	u32 nbp_mclk[TRINITY_NUM_NBPSTATES];
     85 	u32 nbp_nclk[TRINITY_NUM_NBPSTATES];
     86 	u16 nbp_voltage_index[TRINITY_NUM_NBPSTATES];
     87 	u16 bootup_nb_voltage_index;
     88 	u8 htc_tmp_lmt;
     89 	u8 htc_hyst_lmt;
     90 	struct sumo_sclk_voltage_mapping_table sclk_voltage_mapping_table;
     91 	struct sumo_vid_mapping_table vid_mapping_table;
     92 	u32 uma_channel_number;
     93 	struct trinity_uvd_clock_table_entry uvd_clock_table_entries[4];
     94 };
     95 
     96 struct trinity_power_info {
     97 	u32 at[SUMO_MAX_HARDWARE_POWERLEVELS];
     98 	u32 dpm_interval;
     99 	u32 thermal_auto_throttling;
    100 	struct trinity_sys_info sys_info;
    101 	struct trinity_pl boot_pl;
    102 	u32 min_sclk_did;
    103 	bool enable_nbps_policy;
    104 	bool voltage_drop_in_dce;
    105 	bool override_dynamic_mgpg;
    106 	bool enable_gfx_clock_gating;
    107 	bool enable_gfx_power_gating;
    108 	bool enable_mg_clock_gating;
    109 	bool enable_gfx_dynamic_mgpg;
    110 	bool enable_auto_thermal_throttling;
    111 	bool enable_dpm;
    112 	bool enable_sclk_ds;
    113 	bool enable_bapm;
    114 	bool uvd_dpm;
    115 	struct radeon_ps current_rps;
    116 	struct trinity_ps current_ps;
    117 	struct radeon_ps requested_rps;
    118 	struct trinity_ps requested_ps;
    119 };
    120 
    121 #define TRINITY_AT_DFLT            30
    122 
    123 /* trinity_smc.c */
    124 int trinity_dpm_bapm_enable(struct radeon_device *rdev, bool enable);
    125 int trinity_dpm_config(struct radeon_device *rdev, bool enable);
    126 int trinity_uvd_dpm_config(struct radeon_device *rdev);
    127 int trinity_dpm_force_state(struct radeon_device *rdev, u32 n);
    128 int trinity_dpm_n_levels_disabled(struct radeon_device *rdev, u32 n);
    129 int trinity_dpm_no_forced_level(struct radeon_device *rdev);
    130 int trinity_dce_enable_voltage_adjustment(struct radeon_device *rdev,
    131 					  bool enable);
    132 int trinity_gfx_dynamic_mgpg_config(struct radeon_device *rdev);
    133 void trinity_acquire_mutex(struct radeon_device *rdev);
    134 void trinity_release_mutex(struct radeon_device *rdev);
    135 
    136 #endif
    137