| /src/sys/arch/sun3/sun3x/ |
| enable.c | 44 volatile short *enable_reg; variable in typeref:typename:volatile short *
52 enable_reg = (void *)va;
67 ena = *enable_reg;
74 *enable_reg = ena;
85 ena = *enable_reg;
92 *enable_reg = ena;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/ |
| irq_service.h | 51 uint32_t enable_reg; member in struct:irq_source_info
|
| /src/sys/arch/arm/sunxi/ |
| sunxi_nmi.c | 60 /* enable_reg */
67 bus_size_t enable_reg; member in struct:sunxi_nmi_config
74 .enable_reg = 0x08,
81 .enable_reg = 0x40,
88 .enable_reg = 0x08,
139 val = NMI_READ(sc, sc->sc_config->enable_reg);
144 NMI_WRITE(sc, sc->sc_config->enable_reg, val);
|
| /src/sys/dev/i2c/ |
| rkpmic.c | 80 uint8_t enable_reg; member in struct:rkpmic_ctrl
102 .enable_reg = 0x23, .enable_mask = __BIT(0),
106 .enable_reg = 0x23, .enable_mask = __BIT(1),
110 .enable_reg = 0x23, .enable_mask = __BIT(2) },
112 .enable_reg = 0x23, .enable_mask = __BIT(3),
118 .enable_reg = 0x27, .enable_mask = __BIT(0),
122 .enable_reg = 0x27, .enable_mask = __BIT(1),
126 .enable_reg = 0x27, .enable_mask = __BIT(2),
140 .enable_reg = 0x23, .enable_mask = __BIT(0),
144 .enable_reg = 0x23, .enable_mask = __BIT(1)
[all...] |
| as3722.c | 135 u_int enable_reg; member in struct:as3722regdef
148 .enable_reg = AS3722_SDCONTROL_REG,
155 .enable_reg = AS3722_LDOCONTROL0_REG,
586 error = as3722_set_clear(asc, regdef->enable_reg,
589 error = as3722_set_clear(asc, regdef->enable_reg,
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_dpll_mgr.c | 3272 i915_reg_t enable_reg)
3284 val = I915_READ(enable_reg);
3311 i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id); local in function:combo_pll_get_hw_state
3315 enable_reg = MG_PLL_ENABLE(0);
3318 return icl_pll_get_hw_state(dev_priv, pll, hw_state, enable_reg);
3474 i915_reg_t enable_reg)
3478 val = I915_READ(enable_reg);
3480 I915_WRITE(enable_reg, val);
3486 if (intel_de_wait_for_set(dev_priv, enable_reg, PLL_POWER_STATE, 1))
3492 i915_reg_t enable_reg)
3508 i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id); local in function:combo_pll_enable
3559 i915_reg_t enable_reg = local in function:mg_pll_enable
3619 i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id); local in function:combo_pll_disable
3643 i915_reg_t enable_reg = local in function:mg_pll_disable
[all...] |
