| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| qcom-msm8226.dtsi | 9 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
37 gcc: clock-controller@fc400000 { label in label:soc
38 compatible = "qcom,gcc-msm8226";
60 clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
73 clocks = <&gcc GCC_PRNG_AHB_CLK>;
|
| qcom-msm8960.dtsi | 5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
118 gcc: clock-controller@900000 { label
119 compatible = "qcom,gcc-msm8960";
183 clocks = <&gcc GSBI5_H_CLK>;
196 clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
248 clocks = <&gcc PRNG_CLK>;
273 clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
290 clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>
[all...] |
| qcom-ipq4019.dtsi | 8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
54 clocks = <&gcc GCC_APPS_CLK_SRC>;
68 clocks = <&gcc GCC_APPS_CLK_SRC>;
82 clocks = <&gcc GCC_APPS_CLK_SRC>;
96 clocks = <&gcc GCC_APPS_CLK_SRC>;
186 gcc: clock-controller@1800000 { label
187 compatible = "qcom,gcc-ipq4019";
196 clocks = <&gcc GCC_PRNG_AHB_CLK>;
228 clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>
[all...] |
| qcom-mdm9615.dtsi | 49 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
50 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
139 gcc: clock-controller@900000 { label
140 compatible = "qcom,gcc-mdm9615";
161 clocks = <&gcc PRNG_CLK>;
163 assigned-clocks = <&gcc PRNG_CLK>;
171 clocks = <&gcc GSBI2_H_CLK>;
185 clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
195 clocks = <&gcc GSBI3_H_CLK>
[all...] |
| qcom-sdx55.dtsi | 9 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
195 gcc: clock-controller@100000 { label in label:soc
196 compatible = "qcom,gcc-sdx55";
209 clocks = <&gcc 30>,
210 <&gcc 9>;
224 resets = <&gcc GCC_QUSB2PHY_BCR>;
236 clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
237 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
238 <&gcc GCC_USB3_PRIM_CLKREF_CLK>;
241 resets = <&gcc GCC_USB3PHY_PHY_BCR>
[all...] |
| qcom-apq8084.dtsi | 5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
99 clocks = <&gcc GCC_CE1_CLK> , <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>;
378 gcc: clock-controller@fc400000 { label
379 compatible = "qcom,gcc-apq8084";
417 clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
428 clocks = <&gcc GCC_SDCC1_APPS_CLK>,
429 <&gcc GCC_SDCC1_AHB_CLK>
[all...] |
| qcom-ipq8064.dtsi | 7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
484 clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
487 resets = <&gcc ADM0_RESET>,
488 <&gcc ADM0_PBUS_RESET>,
489 <&gcc ADM0_C0_RESET>,
490 <&gcc ADM0_C1_RESET>,
491 <&gcc ADM0_C2_RESET>;
514 clocks = <&gcc GSBI2_H_CLK>
738 gcc: clock-controller@900000 { label
[all...] |
| qcom-msm8660.dtsi | 6 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
22 enable-method = "qcom,gcc-msm8660";
30 enable-method = "qcom,gcc-msm8660";
126 gcc: clock-controller@900000 { label
127 compatible = "qcom,gcc-msm8660";
137 clocks = <&gcc GSBI6_H_CLK>;
151 clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>;
160 clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>
[all...] |
| qcom-msm8974.dtsi | 6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
503 clocks = <&gcc GCC_CE1_CLK>, <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>;
662 gcc: clock-controller@fc400000 { label
663 compatible = "qcom,gcc-msm8974";
704 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
713 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>
[all...] |
| qcom-apq8064.dtsi | 4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
108 thermal-sensors = <&gcc 7>;
129 thermal-sensors = <&gcc 8>;
150 thermal-sensors = <&gcc 9>;
171 thermal-sensors = <&gcc 10>;
442 clocks = <&gcc GSBI1_H_CLK>;
455 clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
467 clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>
823 gcc: clock-controller@900000 { label
[all...] |
| /src/tools/gcc/ |
| Makefile | 15 MKNATIVE?= ${.CURDIR}/mknative-gcc
18 # default, e.g., NetBSD 8.x with GCC 5.5.
34 .include "gcc-version.mk"
101 ALL_TARGET= all-gcc
102 INSTALL_TARGET= install-gcc
108 # mknative-gcc specific stuff
155 CCADDFLAGS= --sysroot=${DESTDIR} -L${DESTDIR}/lib -L${DESTDIR}/usr/lib -B${DESTDIR}/usr/lib/ -I${.OBJDIR}/.native/gcc/include
177 native-gcc: .native/.configure_done
178 @echo 'Extracting GNU GCC configury for a native toolchain.'
179 @MAKE=${BUILD_MAKE:Q} ${HOST_SH} ${MKNATIVE} gcc \
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/ |
| ipq6018.dtsi | 9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
191 clocks = <&gcc GCC_PRNG_AHB_CLK>;
199 clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
210 clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
211 <&gcc GCC_CRYPTO_AXI_CLK>,
212 <&gcc GCC_CRYPTO_CLK>;
247 gcc: gcc@1800000 { label in label:soc
248 compatible = "qcom,gcc-ipq6018"
[all...] |
| ipq8074.dtsi | 7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
99 clocks = <&gcc GCC_USB1_AUX_CLK>,
100 <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
104 resets = <&gcc GCC_USB1_PHY_BCR>,
105 <&gcc GCC_USB3PHY_1_PHY_BCR>;
115 clocks = <&gcc GCC_USB1_PIPE_CLK>;
126 clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
130 resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
142 clocks = <&gcc GCC_USB0_AUX_CLK>,
143 <&gcc GCC_USB0_PHY_CFG_AHB_CLK>
289 gcc: gcc@1800000 { label in label:soc
[all...] |
| sm6125.dtsi | 6 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
360 gcc: clock-controller@1400000 { label
361 compatible = "qcom,gcc-sm6125";
376 <&gcc GCC_AHB2PHY_USB_CLK>;
379 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
397 clocks = <&gcc GCC_SDCC1_AHB_CLK>,
398 <&gcc GCC_SDCC1_APPS_CLK>,
415 clocks = <&gcc GCC_SDCC2_AHB_CLK>,
416 <&gcc GCC_SDCC2_APPS_CLK>,
435 clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>
[all...] |
| msm8994.dtsi | 6 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
422 clocks = <&gcc GCC_USB30_MASTER_CLK>,
423 <&gcc GCC_SYS_NOC_USB3_AXI_CLK>,
424 <&gcc GCC_USB30_SLEEP_CLK>,
425 <&gcc GCC_USB30_MOCK_UTMI_CLK>;
428 assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
429 <&gcc GCC_USB30_MASTER_CLK>;
432 power-domains = <&gcc USB30_GDSC>;
455 clocks = <&gcc GCC_SDCC1_APPS_CLK>,
456 <&gcc GCC_SDCC1_AHB_CLK>
710 gcc: clock-controller@fc400000 { label
[all...] |
| msm8916.dtsi | 7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
228 clocks = <&gcc GCC_CRYPTO_CLK>,
229 <&gcc GCC_CRYPTO_AXI_CLK>,
230 <&gcc GCC_CRYPTO_AHB_CLK>;
426 clocks = <&gcc GCC_PRNG_AHB_CLK>;
923 gcc: clock-controller@1800000 { label
924 compatible = "qcom,gcc-msm8916";
949 power-domains = <&gcc MDSS_GDSC>;
951 clocks = <&gcc GCC_MDSS_AHB_CLK>
[all...] |
| qcs404.dtsi | 5 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
313 clocks = <&gcc GCC_CDSP_CFG_AHB_CLK>;
331 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
332 <&gcc GCC_USB3_PHY_PIPE_CLK>;
334 resets = <&gcc GCC_USB3_PHY_BCR>,
335 <&gcc GCC_USB3PHY_PHY_BCR>;
345 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
346 <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
348 resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>,
349 <&gcc GCC_USB2A_PHY_BCR>
702 gcc: clock-controller@1800000 { label
[all...] |
| sdm630.dtsi | 7 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
532 gcc: clock-controller@100000 { label
533 compatible = "qcom,gcc-sdm630";
569 clocks = <&gcc GCC_PRNG_AHB_CLK>;
667 <&gcc GCC_UFS_AXI_CLK>,
668 <&gcc GCC_AGGRE2_UFS_AXI_CLK>,
669 <&gcc GCC_AGGRE2_USB3_AXI_CLK>,
670 <&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
1024 clocks = <&gcc GCC_GPU_CFG_AHB_CLK>,
1026 <&gcc GCC_BIMC_GFX_CLK>
[all...] |
| msm8996.dtsi | 6 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
590 clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
591 <&gcc GCC_PCIE_PHY_CFG_AHB_CLK>,
592 <&gcc GCC_PCIE_CLKREF_CLK>;
595 resets = <&gcc GCC_PCIE_PHY_BCR>,
596 <&gcc GCC_PCIE_PHY_COM_BCR>,
597 <&gcc GCC_PCIE_PHY_COM_NOCSR_BCR>;
608 clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
610 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
621 clocks = <&gcc GCC_PCIE_1_PIPE_CLK>
675 gcc: clock-controller@300000 { label
[all...] |
| msm8998.dtsi | 5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
852 gcc: clock-controller@100000 { label in label:soc
853 compatible = "qcom,gcc-msm8998";
962 clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
963 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
964 <&gcc GCC_PCIE_0_SLV_AXI_CLK>,
965 <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
966 <&gcc GCC_PCIE_0_AUX_CLK>;
969 power-domains = <&gcc PCIE_0_GDSC>;
982 clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>
[all...] |
| sc7280.dtsi | 8 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
425 gcc: clock-controller@100000 { label in label:soc
426 compatible = "qcom,gcc-sc7280";
456 clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
476 clocks = <&gcc GCC_SDCC1_APPS_CLK>,
477 <&gcc GCC_SDCC1_AHB_CLK>,
521 clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
522 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
532 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
638 clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>
[all...] |
| sm8350.dtsi | 7 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
440 gcc: clock-controller@100000 { label in label:soc
441 compatible = "qcom,gcc-sm8350";
463 clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
464 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
474 clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
488 clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
489 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
499 clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
1013 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>
[all...] |
| sc7180.dtsi | 9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
662 gcc: clock-controller@100000 { label in label:soc
663 compatible = "qcom,gcc-sc7180";
681 clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
708 clocks = <&gcc GCC_SDCC1_APPS_CLK>,
709 <&gcc GCC_SDCC1_AHB_CLK>,
771 clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
772 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
783 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
803 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>
[all...] |
| /src/usr.bin/make/ |
| test-variants.mk | 29 # messages. Clang has a few stricter checks than GCC, concerning enums
104 # When optimizing for small code size, GCC gets confused by the initialization
156 # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96622
170 # This test is the result of reading through the GCC 10 "Warning Options"
173 TESTS+= gcc-warn
174 CFLAGS.gcc-warn= -Wmisleading-indentation
175 CFLAGS.gcc-warn+= -Wmissing-attributes
176 CFLAGS.gcc-warn+= -Wmissing-braces
177 CFLAGS.gcc-warn+= -Wextra
178 CFLAGS.gcc-warn+= -Wnonnul
[all...] |
| /src/share/mk/ |
| bsd.own.mk | 59 # the in-tree gcc toolchain, this list is empty.
71 # GCC Using platforms.
76 # What GCC is used?
81 # Platforms that can't run a modern GCC natively
87 # We import the old gcc as "gcc.old" when upgrading. EXTERNAL_GCC_SUBDIR is
91 EXTERNAL_GCC_SUBDIR?= gcc.old
93 EXTERNAL_GCC_SUBDIR?= gcc
103 # Build GCC with the "isl" library enabled.
104 # The alpha port does not work with it, see GCC PR's 84204 and 84353
[all...] |
