| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/ |
| nouveau_nvkm_engine_gr_gp102.c | 94 u32 mask = 0, data, gpc; local in function:gp102_gr_init_swdx_pes_mask
96 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
97 data = nvkm_rd32(device, GPC_UNIT(gpc, 0x0c50)) & 0x0000000f;
98 mask |= data << (gpc * 4);
|
| nouveau_nvkm_engine_gr_tu102.c | 50 nvkm_wr32(device, GPC_UNIT(gr->sm[sm].gpc, 0x0c10 +
64 u8 bank[GPC_MAX] = {}, gpc, i, j; local in function:tu102_gr_init_zcull
75 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
76 nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),
77 gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);
78 nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |
80 nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);
|
| nouveau_nvkm_engine_gr_ctxgm200.c | 60 const u8 gpc = gr->sm[sm].gpc; local in function:gm200_grctx_generate_smid_config
62 dist[sm / 4] |= ((gpc << 4) | tpc) << ((sm % 4) * 8);
63 gpcs[gpc] |= sm << (tpc * 8);
92 int gpc, ppc, i; local in function:gm200_grctx_generate_dist_skip_table
94 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
95 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++) {
96 u8 ppc_tpcs = gr->ppc_tpc_nr[gpc][ppc]
[all...] |
| nouveau_nvkm_engine_gr_gf117.c | 136 u8 bank[GPC_MAX] = {}, gpc, i, j; local in function:gf117_gr_init_zcull
147 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
148 nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),
149 gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);
150 nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |
152 nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);
|
| nouveau_nvkm_engine_gr_ctxgp100.c | 61 int gpc, ppc, b, n = 0; local in function:gp100_grctx_generate_attrib
63 for (gpc = 0; gpc < gr->gpc_nr; gpc++)
64 size += grctx->attrib_nr_max * gr->ppc_nr[gpc] * gr->ppc_tpc_max;
77 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
78 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) {
79 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]
109 const u8 gpc = gr->sm[sm].gpc; local in function:gp100_grctx_generate_smid_config
[all...] |
| nouveau_nvkm_engine_gr_ctxgp102.c | 57 int gpc, ppc, b, n = 0; local in function:gp102_grctx_generate_attrib
59 for (gpc = 0; gpc < gr->gpc_nr; gpc++)
60 size += grctx->gfxp_nr * gr->ppc_nr[gpc] * gr->ppc_tpc_max;
73 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
74 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) {
75 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]
[all...] |
| nouveau_nvkm_engine_gr_ctxgf108.c | 754 int gpc, tpc; local in function:gf108_grctx_generate_attrib
761 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
762 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
766 const u32 o = TPC_UNIT(gpc, tpc, 0x500);
|
| nouveau_nvkm_engine_gr_ctxgf117.c | 262 int gpc, ppc; local in function:gf117_grctx_generate_attrib
269 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
270 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++) {
271 const u32 a = alpha * gr->ppc_tpc_nr[gpc][ppc];
272 const u32 b = beta * gr->ppc_tpc_nr[gpc][ppc];
274 const u32 o = PPC_UNIT(gpc, ppc, 0);
275 if (!(gr->ppc_mask[gpc] & (1 << ppc)))
279 bo += grctx->attrib_nr_max * gr->ppc_tpc_nr[gpc][ppc]
[all...] |
| nouveau_nvkm_engine_gr_ctxgv100.c | 78 int gpc, ppc, b, n = 0; local in function:gv100_grctx_generate_attrib
80 for (gpc = 0; gpc < gr->gpc_nr; gpc++)
81 size += grctx->gfxp_nr * gr->ppc_nr[gpc] * gr->ppc_tpc_max;
93 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
94 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) {
95 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]
[all...] |
| nouveau_nvkm_engine_gr_ctxgk104.c | 938 int i, j, gpc, ppc; local in function:gk104_grctx_generate_alpha_beta_tables
946 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
948 u32 ppc_tpcs = gr->ppc_tpc_nr[gpc][ppc];
959 pmask = gr->ppc_tpc_mask[gpc][ppc];
962 amask |= (u64)pmask << (gpc * 8);
964 pmask ^= gr->ppc_tpc_mask[gpc][ppc];
965 bmask |= (u64)pmask << (gpc * 8);
|
| nouveau_nvkm_engine_gr_ctxgm107.c | 926 int gpc, ppc, n = 0; local in function:gm107_grctx_generate_attrib
934 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
935 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) {
936 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc];
937 const u32 bs = attrib * gr->ppc_tpc_nr[gpc][ppc];
939 const u32 o = PPC_UNIT(gpc, ppc, 0);
940 if (!(gr->ppc_mask[gpc] & (1 << ppc)))
944 bo += grctx->attrib_nr_max * gr->ppc_tpc_nr[gpc][ppc]
[all...] |
| nouveau_nvkm_engine_gr_gk104.c | 423 int gpc, ppc; local in function:gk104_gr_init_ppc_exceptions
425 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
426 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++) {
427 if (!(gr->ppc_mask[gpc] & (1 << ppc)))
429 nvkm_wr32(device, PPC_UNIT(gpc, ppc, 0x038), 0xc0000000);
|
| nouveau_nvkm_engine_gr_ctxgf100.c | 1077 int gpc, tpc; local in function:gf100_grctx_generate_attrib
1084 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
1085 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
1086 const u32 o = TPC_UNIT(gpc, tpc, 0x0520);
1111 data |= gr->sm[sm++].gpc << (j * 8);
1280 int i, gpc; local in function:gf100_grctx_generate_alpha_beta_tables
1292 for (gpc = 0; atarget && gpc < gr->gpc_nr; gpc++)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvif/ |
| ifc00d.h | 39 __u8 gpc; member in struct:gp100_vmm_fault_cancel_v0
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/ |
| fault.h | 28 u8 gpc; member in struct:nvkm_fault_data
|
| /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/ingenic/ |
| jz4740.dtsi | 155 gpc: gpio@2 { label in label:pinctrl
|
| jz4725b.dtsi | 164 gpc: gpio@2 { label in label:pinctrl
|
| jz4770.dtsi | 174 gpc: gpio@2 { label in label:pinctrl
|
| jz4780.dtsi | 197 gpc: gpio@2 { label in label:pinctrl
|
| x1000.dtsi | 179 gpc: gpio@2 { label in label:pinctrl
|
| x1830.dtsi | 172 gpc: gpio@2 { label in label:pinctrl
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| s3c2416-pinctrl.dtsi | 25 gpc: gpc { label
|
| imx6sl.dtsi | 101 interrupt-parent = <&gpc>;
114 interrupt-parent = <&gpc>;
628 interrupt-parent = <&gpc>;
692 gpc: gpc@20dc000 { label in label:aips1
693 compatible = "fsl,imx6sl-gpc", "fsl,imx6q-gpc";
|
| imx6sll.dtsi | 114 interrupt-parent = <&gpc>;
530 interrupt-parent = <&gpc>;
596 gpc: interrupt-controller@20dc000 { label in label:aips1
597 compatible = "fsl,imx6sll-gpc", "fsl,imx6q-gpc";
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/ |
| nouveau_svm.c | 64 u8 gpc; member in struct:nouveau_svm::nouveau_svm_fault_buffer::nouveau_svm_fault
405 u64 inst, u8 hub, u8 gpc, u8 client)
407 SVM_DBG(svm, "cancel %016llx %d %02x %02x", inst, hub, gpc, client);
412 .gpc = gpc,
424 fault->gpc,
457 const u8 gpc = (info & 0x1f000000) >> 24; local in function:nouveau_svm_fault_cache
471 nouveau_svm_fault_cancel(svm, inst, hub, gpc, client);
482 fault->gpc = gpc;
[all...] |
