1 /* $NetBSD: intel_dsi.h,v 1.2 2021/12/18 23:45:30 riastradh Exp $ */ 2 3 /* 4 * Copyright 2013 Intel Corporation 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 */ 25 26 #ifndef _INTEL_DSI_H 27 #define _INTEL_DSI_H 28 29 #include <drm/drm_crtc.h> 30 #include <drm/drm_mipi_dsi.h> 31 32 #include "intel_display_types.h" 33 34 #define INTEL_DSI_VIDEO_MODE 0 35 #define INTEL_DSI_COMMAND_MODE 1 36 37 /* Dual Link support */ 38 #define DSI_DUAL_LINK_NONE 0 39 #define DSI_DUAL_LINK_FRONT_BACK 1 40 #define DSI_DUAL_LINK_PIXEL_ALT 2 41 42 struct intel_dsi_host; 43 44 struct intel_dsi { 45 struct intel_encoder base; 46 47 struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS]; 48 intel_wakeref_t io_wakeref[I915_MAX_PORTS]; 49 50 /* GPIO Desc for panel and backlight control */ 51 struct gpio_desc *gpio_panel; 52 struct gpio_desc *gpio_backlight; 53 54 struct intel_connector *attached_connector; 55 56 /* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */ 57 union { 58 u16 ports; /* VLV DSI */ 59 u16 phys; /* ICL DSI */ 60 }; 61 62 /* if true, use HS mode, otherwise LP */ 63 bool hs; 64 65 /* virtual channel */ 66 int channel; 67 68 /* Video mode or command mode */ 69 u16 operation_mode; 70 71 /* number of DSI lanes */ 72 unsigned int lane_count; 73 74 /* i2c bus associated with the slave device */ 75 int i2c_bus_num; 76 77 /* 78 * video mode pixel format 79 * 80 * XXX: consolidate on .format in struct mipi_dsi_device. 81 */ 82 enum mipi_dsi_pixel_format pixel_format; 83 84 /* video mode format for MIPI_VIDEO_MODE_FORMAT register */ 85 u32 video_mode_format; 86 87 /* eot for MIPI_EOT_DISABLE register */ 88 u8 eotp_pkt; 89 u8 clock_stop; 90 91 u8 escape_clk_div; 92 u8 dual_link; 93 94 u16 dcs_backlight_ports; 95 u16 dcs_cabc_ports; 96 97 /* RGB or BGR */ 98 bool bgr_enabled; 99 100 u8 pixel_overlap; 101 u32 port_bits; 102 u32 bw_timer; 103 u32 dphy_reg; 104 105 /* data lanes dphy timing */ 106 u32 dphy_data_lane_reg; 107 u32 video_frmt_cfg_bits; 108 u16 lp_byte_clk; 109 110 /* timeouts in byte clocks */ 111 u16 hs_tx_timeout; 112 u16 lp_rx_timeout; 113 u16 turn_arnd_val; 114 u16 rst_timer_val; 115 u16 hs_to_lp_count; 116 u16 clk_lp_to_hs_count; 117 u16 clk_hs_to_lp_count; 118 119 u16 init_count; 120 u32 pclk; 121 u16 burst_mode_ratio; 122 123 /* all delays in ms */ 124 u16 backlight_off_delay; 125 u16 backlight_on_delay; 126 u16 panel_on_delay; 127 u16 panel_off_delay; 128 u16 panel_pwr_cycle_delay; 129 }; 130 131 struct intel_dsi_host { 132 struct mipi_dsi_host base; 133 struct intel_dsi *intel_dsi; 134 enum port port; 135 136 /* our little hack */ 137 struct mipi_dsi_device *device; 138 }; 139 140 static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h) 141 { 142 return container_of(h, struct intel_dsi_host, base); 143 } 144 145 #define for_each_dsi_port(__port, __ports_mask) \ 146 for_each_port_masked(__port, __ports_mask) 147 #define for_each_dsi_phy(__phy, __phys_mask) \ 148 for_each_phy_masked(__phy, __phys_mask) 149 150 static inline struct intel_dsi *enc_to_intel_dsi(struct intel_encoder *encoder) 151 { 152 return container_of(&encoder->base, struct intel_dsi, base.base); 153 } 154 155 static inline bool is_vid_mode(struct intel_dsi *intel_dsi) 156 { 157 return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE; 158 } 159 160 static inline bool is_cmd_mode(struct intel_dsi *intel_dsi) 161 { 162 return intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE; 163 } 164 165 static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder) 166 { 167 return enc_to_intel_dsi(encoder)->ports; 168 } 169 170 /* icl_dsi.c */ 171 void icl_dsi_init(struct drm_i915_private *dev_priv); 172 173 /* intel_dsi.c */ 174 int intel_dsi_bitrate(const struct intel_dsi *intel_dsi); 175 int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi); 176 enum drm_panel_orientation 177 intel_dsi_get_panel_orientation(struct intel_connector *connector); 178 179 /* vlv_dsi.c */ 180 void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port); 181 enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt); 182 int intel_dsi_get_modes(struct drm_connector *connector); 183 enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector, 184 struct drm_display_mode *mode); 185 struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi, 186 const struct mipi_dsi_host_ops *funcs, 187 enum port port); 188 void vlv_dsi_init(struct drm_i915_private *dev_priv); 189 190 /* vlv_dsi_pll.c */ 191 int vlv_dsi_pll_compute(struct intel_encoder *encoder, 192 struct intel_crtc_state *config); 193 void vlv_dsi_pll_enable(struct intel_encoder *encoder, 194 const struct intel_crtc_state *config); 195 void vlv_dsi_pll_disable(struct intel_encoder *encoder); 196 u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, 197 struct intel_crtc_state *config); 198 void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); 199 200 bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); 201 int bxt_dsi_pll_compute(struct intel_encoder *encoder, 202 struct intel_crtc_state *config); 203 void bxt_dsi_pll_enable(struct intel_encoder *encoder, 204 const struct intel_crtc_state *config); 205 void bxt_dsi_pll_disable(struct intel_encoder *encoder); 206 u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, 207 struct intel_crtc_state *config); 208 void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); 209 210 /* intel_dsi_vbt.c */ 211 bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id); 212 void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on); 213 void intel_dsi_vbt_gpio_cleanup(struct intel_dsi *intel_dsi); 214 void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi, 215 enum mipi_seq seq_id); 216 void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec); 217 void intel_dsi_log_params(struct intel_dsi *intel_dsi); 218 219 #endif /* _INTEL_DSI_H */ 220
Indexes created Sat Sep 20 22:09:52 GMT 2025