| /src/sys/arch/alpha/alpha/ |
| patch.c | 71 alpha_instruction insn = { local in function:patch_lock_stubs
82 *lock_stub_patch_table[i] = insn.bits;
|
| db_interface.c | 391 alpha_instruction insn; local in function:db_inst_call
393 insn.bits = ins;
394 return ((insn.branch_format.opcode == op_bsr) ||
395 ((insn.jump_format.opcode == op_j) &&
396 (insn.jump_format.action & 1)));
402 alpha_instruction insn; local in function:db_inst_return
404 insn.bits = ins;
405 return ((insn.jump_format.opcode == op_j) &&
406 (insn.jump_format.action == op_ret));
412 alpha_instruction insn; local in function:db_inst_trap_return
422 alpha_instruction insn; local in function:db_inst_branch
451 alpha_instruction insn; local in function:db_inst_unconditional_flow_transfer
486 alpha_instruction insn; local in function:db_inst_load
516 alpha_instruction insn; local in function:db_inst_store
545 alpha_instruction insn; local in function:db_branch_taken
[all...] |
| /src/sys/arch/mips/mips/ |
| kobj_machdep.c | 70 uint32_t *insn; local in function:kobj_reloc
94 insn = (void *)where;
129 KASSERT((*insn & 0x3ffffff) == 0);
130 DPRINTF(" orig insn = 0x%08x\n", *insn);
131 *insn |= addr;
132 DPRINTF(" new insn = 0x%08x\n", *insn);
142 KASSERT((*insn & 0xffff) == 0);
143 DPRINTF(" orig insn = 0x%08x\n", *insn)
[all...] |
| trap.c | 181 InstFmt insn; local in function:trap
598 insn.word = instr;
608 if ((insn.JType.op == OP_SPECIAL) &&
609 (insn.RType.func == OP_BREAK)) {
610 int code = (insn.RType.rs << 5) | insn.RType.rt;
705 insn.word = instr;
712 if ((insn.JType.op == OP_SPECIAL) &&
713 (insn.RType.func == OP_TEQ)) {
714 int code = (insn.RType.rd << 5) | insn.RType.shamt
[all...] |
| mips_fixup.c | 90 const uint32_t insn = *insnp; local in function:mips_fixup_exceptions
91 if (INSN_LUI_P(insn)) {
92 const int32_t offset = insn << 16;
93 lui_reg = (insn >> 16) & 31;
95 printf("%s: %#x: insn %08x: lui r%zu, %%hi(%#x)",
97 insn, lui_reg, offset);
102 lui_insn = insn;
116 && (INSN_LOAD_P(insn) || INSN_STORE_P(insn))) {
117 size_t base = (insn >> 21) & 31
244 uint32_t insn = *insnp; local in function:fixup_mips_jump
317 const InstFmt insn = { .word = stubp[n] }; local in function:mips_fixup_addr
487 uint32_t insn = *insnp; local in function:mips_fixup_stubs
[all...] |
| /src/sys/arch/aarch64/aarch64/ |
| db_disasm.c | 139 uint32_t insn = 0; local in function:strdisasm
143 size = fetch_arm_insn(pc, spsr, &insn);
147 ".insn 0x%0*x (%s)", size * 2, insn, arch);
|
| kobj_machdep.c | 130 uint32_t *insn, immhi, immlo, shift; local in function:kobj_reloc
162 insn = (uint32_t *)where;
193 le32toh(*insn), strdisasm((vaddr_t)insn, 0));
256 *insn = htole32(
257 (le32toh(*insn) & ~__BITS(21,10)) | (val << 10));
278 *insn = htole32((le32toh(*insn) &
302 *insn = htole32((le32toh(*insn) & ~__BITS(25,0)) | val)
[all...] |
| /src/sys/arch/arm/include/ |
| locore.h | 199 uint32_t insn; local in function:read_insn
201 __asm __volatile("ldrt %0, [%1]" : "=&r"(insn) : "r"(va));
203 insn = *(const uint32_t *)va;
206 insn = bswap32(insn);
208 return insn;
218 uint32_t insn; local in function:read_thumb_insn
221 __asm __volatile("ldrht %0, [%1, #0]" : "=&r"(insn) : "r"(va));
223 __asm __volatile("ldrht %0, [%1], #0" : "=&r"(insn) : "r"(va));
225 __asm __volatile("ldrt %0, [%1]" : "=&r"(insn) : "r"(va & ~3))
[all...] |
| /src/sys/arch/arm/arm/ |
| syscall.c | 97 uint32_t insn; local in function:swi_handler
132 insn = 0xef000000 | SWI_OS_NETBSD | tf->tf_r0;
138 insn = read_insn(tf->tf_pc - INSN_SIZE, true);
160 if ((insn & 0x0f000000) != 0x0f000000) {
170 (*l->l_proc->p_md.md_syscall)(tf, l, insn);
182 syscall(struct trapframe *tf, lwp_t *l, uint32_t insn)
194 const uint32_t os_mask = insn & SWI_OS_MASK;
195 uint32_t code = insn & 0x000fffff;
201 const uint32_t swi = __SHIFTOUT(insn, __BITS(23,0));
217 ksi.ksi_trap = insn;
[all...] |
| undefined.c | 126 cp15_trapper(u_int addr, u_int insn, struct trapframe *tf, int code)
140 const u_int regno = (insn >> 12) & 15;
152 if ((insn & 0xffff0fff) == 0xee1d0f70) {
162 if ((insn & 0xffef0fff) == 0xee0d0f50) {
164 if (insn & 0x00100000)
177 gdb_trapper(u_int addr, u_int insn, struct trapframe *tf, int code)
183 if (insn == GDB_THUMB_BREAKPOINT)
189 if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) {
221 vfp_test(u_int address, u_int insn, trapframe_t *frame, int fault_code
261 u_int insn = read_insn(addr, false); local in function:dtrace_trapper
[all...] |
| disassem.c | 66 * insn[cc][mod] [operands]
435 u_int insn; local in function:disasm
443 di->di_printf("thumb insn\n");
449 insn = di->di_readword(loc);
451 insn = bswap32(insn);
456 /* di->di_printf("loc=%08x insn=%08x : ", loc, insn);*/
459 if ((insn & i_ptr->mask) == i_ptr->pattern) {
467 di->di_printf("und%s\t%08x\n", insn_condition(insn), insn)
[all...] |
| /src/sys/arch/powerpc/powerpc/ |
| fix_unaligned.c | 37 * - Fetch and decode insn; 403 does not have DSISR.
39 * - Only for integer insn; unaligned floating-point load/store are taken
40 * care of by FPU emulator. (Support for FPU insn should be trivial.)
133 #define DISASM(tf, insn) \
136 opc_disasm((tf)->tf_srr0, (insn)->i_int); \
139 #define DISASM(tf, insn) __nothing
152 union instr insn; local in function:fix_unaligned
157 ret = ufetch_32((uint32_t *)tf->tf_srr0, (uint32_t *)&insn.i_int);
169 if (emul_unaligned(tf, ksi, &insn))
172 CTASSERT(sizeof(insn) == 4); /* It was broken before... *
[all...] |
| process_machdep.c | 292 ppc_ifetch(struct lwp *l, vaddr_t va, uint32_t *insn)
297 iov.iov_base = insn;
298 iov.iov_len = sizeof(*insn);
302 uio.uio_resid = sizeof(*insn);
310 ppc_istore(struct lwp *l, vaddr_t va, uint32_t insn)
315 iov.iov_base = &insn;
316 iov.iov_len = sizeof(insn);
320 uio.uio_resid = sizeof(insn);
339 uint32_t insn; local in function:ppc_sstep
353 if ((rv = ppc_ifetch(l, va[0], &insn)) != 0
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/ |
| nouveau_nvkm_engine_gr_nv40.c | 118 u32 insn = nvkm_rd32(device, 0x400308); local in function:nv40_gr_chan_fini
119 nvkm_warn(subdev, "ctxprog timeout %08x\n", insn);
|
| /src/sys/arch/sparc/sparc/ |
| trap.c | 173 "insn access MMU miss", /* 3c */
819 u_int insn; local in function:mem_access_fault
820 if (ufetch_int((void *)pc, &insn) == 0 &&
821 (insn & 0xc1680000) == 0xc0680000) {
|
| db_disasm.c | 64 * operation is encoded into a particular 32-bit insn. There are 3
66 * bits 30-31 of the insn. Here are the bit fields and their names:
177 s -- %asi is implicit in the insn, rs1 value not used
184 9 -- logical or of the cmask and mmask fields (membar insn)
883 unsigned int insn, you_lose, bitmask; local in function:db_disasm
889 insn = db_get_value(loc, 4, 0);
891 if (insn == 0x01000000) {
937 if (((bitmask & insn) == bitmask) && ((you_lose & insn) == 0)) {
958 if (insn & A(1)
[all...] |
| db_interface.c | 478 union instr insn; local in function:db_branch_taken
481 insn.i_int = inst;
487 if (insn.i_any.i_op != IOP_OP2 || insn.i_branch.i_annul != 1)
490 switch (insn.i_op2.i_op2) {
497 switch (insn.i_branch.i_cond)
524 union instr insn; local in function:db_inst_branch
526 insn.i_int = inst;
528 if (insn.i_any.i_op != IOP_OP2)
531 switch (insn.i_op2.i_op2)
549 union instr insn; local in function:db_inst_call
569 union instr insn; local in function:db_inst_unconditional_flow_transfer
605 union instr insn; local in function:db_inst_trap_return
617 union instr insn; local in function:db_inst_load
657 union instr insn; local in function:db_inst_store
[all...] |
| /src/libexec/ld.elf_so/arch/alpha/ |
| alpha_reloc.c | 409 uint32_t insn[3], *stubptr; local in function:_rtld_relocate_plt_object
460 * First, build an LDA insn to adjust the low 16
463 insn[insncnt++] = 0x08 << 26 | 27 << 21 | 27 << 16 |
476 insn[insncnt++] = 0x09 << 26 | 27 << 21 |
506 insn[insncnt++] = 0x09 << 26 | 27 << 21 |
512 insn[insncnt++] = 0x29 << 26 | 27 << 21 |
519 * Now, build a JMP or BR insn to jump to the target. If
521 * we can use the more efficient BR insn. Otherwise, we
527 insn[insncnt++] = 0x30 << 26 | 31 << 21 |
531 insn[insncnt++] = 0x1a << 26 | 31 << 21
[all...] |
| /src/sys/arch/sparc64/sparc64/ |
| db_disasm.c | 69 * operation is encoded into a particular 32-bit insn. There are 3
71 * bits 30-31 of the insn. Here are the bit fields and their names:
182 s -- %asi is implicit in the insn, rs1 value not used
189 9 -- logical or of the cmask and mmask fields (membar insn)
888 unsigned int insn, you_lose, bitmask; local in function:db_disasm
894 insn = db_get_value(loc, 4, 0);
896 if (insn == 0x01000000) {
942 if (((bitmask & insn) == bitmask) && ((you_lose & insn) == 0)) {
963 if (insn & A(1)
[all...] |
| /src/sys/arch/powerpc/fpu/ |
| fpu_emu.c | 203 * Return true if insn is consumed anyway.
210 union instr insn; local in function:fpu_emulate
217 /* initialize insn.is_datasize to tell it is *not* initialized */
223 if (copyin((void *) (tf->tf_srr0), &insn.i_int, sizeof (insn.i_int))) {
233 DPRINTF(FPE_EX, ("fpu_emulate: emulating insn %x at %p\n",
234 insn.i_int, (void *)tf->tf_srr0));
236 if ((insn.i_any.i_opcd == OPC_TWI) ||
237 ((insn.i_any.i_opcd == OPC_integer_31) &&
238 (insn.i_x.i_xo == OPC31_TW)))
[all...] |
| /src/sys/arch/arm/arm32/ |
| fault.c | 207 printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
214 printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
416 u_int insn = read_thumb_insn(tf->tf_pc, user); local in function:data_abort_handler
417 u_int insn_f8 = insn & 0xf800;
418 u_int insn_fe = insn & 0xfe00;
435 u_int insn = read_insn(tf->tf_pc, user); local in function:data_abort_handler
437 if (((insn & 0x0c100000) == 0x04000000) || /* STR[B] */
438 ((insn & 0x0e1000b0) == 0x000000b0) || /* STR[HD]*/
439 ((insn & 0x0a100000) == 0x08000000) || /* STM/CDT*/
440 ((insn & 0x0f9000f0) == 0x01800090)) /* STREX[BDH] *
[all...] |
| /src/sys/arch/m68k/fpe/ |
| fpu_emulate.c | 70 #define DUMP_INSN(insn) \
71 printf("%s: insn={adv=%d,siz=%d,op=%04x,w1=%04x}\n", \
73 (insn)->is_advance, (insn)->is_datasize, \
74 (insn)->is_opcode, (insn)->is_word1)
77 #define DUMP_INSN(insn) do {} while (/* CONSTCOND */ 0)
89 static struct instruction insn; local in function:fpu_emulate
94 /* initialize insn.is_datasize to tell it is *not* initialized */
95 insn.is_datasize = -1
[all...] |
| /src/sys/arch/sh3/sh3/ |
| db_disasm.c | 153 uint16_t insn; local in function:get_insn
163 if (ufetch_16(pc, &insn))
167 retval = kcopy(pc, &insn, sizeof(insn));
172 return insn;
178 uint16_t insn = get_insn(pc); local in function:get_opcode
183 n0 = (insn & 0xf000) >> 12;
184 n3 = (insn & 0x000f);
194 uint16_t insn = get_insn(pc); local in function:f_02
197 rn = (insn & 0x0f00) >> 8
244 uint16_t insn = get_insn(pc); local in function:f_03
278 uint16_t insn = get_insn(pc); local in function:f_04
307 uint16_t insn = get_insn(pc); local in function:f_08
355 uint16_t insn = get_insn(pc); local in function:f_09
383 uint16_t insn = get_insn(pc); local in function:f_0a
424 uint16_t insn = get_insn(pc); local in function:f_0b
450 uint16_t insn = get_insn(pc); local in function:f_0c
479 uint16_t insn = get_insn(pc); local in function:f_10
493 uint16_t insn = get_insn(pc); local in function:f_20
519 uint16_t insn = get_insn(pc); local in function:f_24
548 uint16_t insn = get_insn(pc); local in function:f_28
578 uint16_t insn = get_insn(pc); local in function:f_2c
607 uint16_t insn = get_insn(pc); local in function:f_30
633 uint16_t insn = get_insn(pc); local in function:f_34
662 uint16_t insn = get_insn(pc); local in function:f_38
688 uint16_t insn = get_insn(pc); local in function:f_3c
718 uint16_t insn = get_insn(pc); local in function:f_40
742 uint16_t insn = get_insn(pc); local in function:f_41
767 uint16_t insn = get_insn(pc); local in function:f_42
808 uint16_t insn = get_insn(pc); local in function:f_43
857 uint16_t insn = get_insn(pc); local in function:f_44
877 uint16_t insn = get_insn(pc); local in function:f_45
901 uint16_t insn = get_insn(pc); local in function:f_46
942 uint16_t insn = get_insn(pc); local in function:f_47
991 uint16_t insn = get_insn(pc); local in function:f_48
1015 uint16_t insn = get_insn(pc); local in function:f_49
1039 uint16_t insn = get_insn(pc); local in function:f_4a
1080 uint16_t insn = get_insn(pc); local in function:f_4b
1104 uint16_t insn = get_insn(pc); local in function:f_4c
1115 uint16_t insn = get_insn(pc); local in function:f_4d
1126 uint16_t insn = get_insn(pc); local in function:f_4e
1175 uint16_t insn = get_insn(pc); local in function:f_4f
1186 uint16_t insn = get_insn(pc); local in function:f_50
1200 uint16_t insn = get_insn(pc); local in function:f_60
1229 uint16_t insn = get_insn(pc); local in function:f_64
1258 uint16_t insn = get_insn(pc); local in function:f_68
1287 uint16_t insn = get_insn(pc); local in function:f_6c
1316 uint16_t insn = get_insn(pc); local in function:f_70
1328 uint16_t insn = get_insn(pc); local in function:f_80
1409 uint16_t insn = get_insn(pc); local in function:f_90
1422 uint16_t insn = get_insn(pc); local in function:f_a0
1436 uint16_t insn = get_insn(pc); local in function:f_b0
1450 uint16_t insn = get_insn(pc); local in function:f_c0
1549 uint16_t insn = get_insn(pc); local in function:f_d0
1562 uint16_t insn = get_insn(pc); local in function:f_e0
1574 uint16_t insn = get_insn(pc); local in function:f_f0
1603 uint16_t insn = get_insn(pc); local in function:f_f4
1632 uint16_t insn = get_insn(pc); local in function:f_f8
1661 uint16_t insn = get_insn(pc); local in function:f_fc
1673 uint16_t insn = get_insn(pc); local in function:f_fd
1731 uint16_t insn = get_insn(pc); local in function:f_fe
[all...] |
| /src/sys/arch/evbmips/rmixl/ |
| machdep.c | 504 const uint32_t insn = *insnp; local in function:rmixl_fixup_curcpu
505 if (__predict_false((insn & LOAD_CURCPU_MASK) == LOAD_CURCPU)) {
511 *insnp = insn ^ LOAD_CURCPU ^ MFC0_CURCPU;
|
| /src/sys/arch/powerpc/booke/ |
| booke_machdep.c | 564 uint32_t insn; local in function:booke_sstep
567 if (ufetch_32((const void *)tf->tf_srr0, &insn) != 0)
572 if ((insn >> 28) == 4) {
574 if ((insn >> 26) == 0x12) {
575 const int32_t off = (((int32_t)insn << 6) >> 6) & ~3;
576 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off;
578 } else if ((insn >> 26) == 0x10) {
579 const int16_t off = insn & ~3;
580 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off;
582 } else if ((insn & 0xfc00fffe) == 0x4c000420)
[all...] |
