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    Searched defs:max_limits (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_kv_dpm.c	2223 struct amdgpu_clock_and_voltage_limits *max_limits = local in function:kv_apply_state_adjust_rules 2234 mclk = max_limits->mclk; 2238 stable_p_state_sclk = (max_limits->sclk * 75) / 100; 2357 struct amdgpu_clock_and_voltage_limits *max_limits = local in function:kv_calculate_nbps_level_settings 2359 u32 mclk = max_limits->mclk;
amdgpu_si_dpm.c	3293 const struct amdgpu_clock_and_voltage_limits *max_limits, 3306 max_limits->sclk, 3313 max_limits->mclk, 3436 struct amdgpu_clock_and_voltage_limits *max_limits; local in function:si_apply_state_adjust_rules 3491 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; 3493 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; 3501 if (ps->performance_levels[i].mclk > max_limits->mclk) 3502 ps->performance_levels[i].mclk = max_limits->mclk; 3503 if (ps->performance_levels[i].sclk > max_limits->sclk) 3504 ps->performance_levels[i].sclk = max_limits->sclk     [all...]
/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_btc_dpm.c	1275 const struct radeon_clock_and_voltage_limits *max_limits, 1288 max_limits->sclk, 1295 max_limits->mclk, 2104 struct radeon_clock_and_voltage_limits *max_limits; local in function:btc_apply_state_adjust_rules 2116 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; 2118 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; 2121 if (ps->high.mclk > max_limits->mclk) 2122 ps->high.mclk = max_limits->mclk; 2123 if (ps->high.sclk > max_limits->sclk) 2124 ps->high.sclk = max_limits->sclk     [all...]
radeon_kv_dpm.c	2158 struct radeon_clock_and_voltage_limits *max_limits = local in function:kv_apply_state_adjust_rules 2169 mclk = max_limits->mclk; 2173 stable_p_state_sclk = (max_limits->sclk * 75) / 100; 2292 struct radeon_clock_and_voltage_limits *max_limits = local in function:kv_calculate_nbps_level_settings 2294 u32 mclk = max_limits->mclk;
radeon_ni_dpm.c	795 struct radeon_clock_and_voltage_limits *max_limits; local in function:ni_apply_state_adjust_rules 808 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; 810 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; 814 if (ps->performance_levels[i].mclk > max_limits->mclk) 815 ps->performance_levels[i].mclk = max_limits->mclk; 816 if (ps->performance_levels[i].sclk > max_limits->sclk) 817 ps->performance_levels[i].sclk = max_limits->sclk; 818 if (ps->performance_levels[i].vddc > max_limits->vddc) 819 ps->performance_levels[i].vddc = max_limits->vddc; 820 if (ps->performance_levels[i].vddci > max_limits->vddci     [all...]
radeon_ci_dpm.c	804 struct radeon_clock_and_voltage_limits *max_limits; local in function:ci_apply_state_adjust_rules 829 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; 831 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; 835 if (ps->performance_levels[i].mclk > max_limits->mclk) 836 ps->performance_levels[i].mclk = max_limits->mclk; 837 if (ps->performance_levels[i].sclk > max_limits->sclk) 838 ps->performance_levels[i].sclk = max_limits->sclk; 3940 const struct radeon_clock_and_voltage_limits *max_limits; local in function:ci_enable_uvd_dpm 3944 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; 3946 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc 3989 const struct radeon_clock_and_voltage_limits *max_limits; local in function:ci_enable_vce_dpm     [all...]
radeon_si_dpm.c	2976 struct radeon_clock_and_voltage_limits *max_limits; local in function:si_apply_state_adjust_rules 3031 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; 3033 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; 3041 if (ps->performance_levels[i].mclk > max_limits->mclk) 3042 ps->performance_levels[i].mclk = max_limits->mclk; 3043 if (ps->performance_levels[i].sclk > max_limits->sclk) 3044 ps->performance_levels[i].sclk = max_limits->sclk; 3045 if (ps->performance_levels[i].vddc > max_limits->vddc) 3046 ps->performance_levels[i].vddc = max_limits->vddc; 3047 if (ps->performance_levels[i].vddci > max_limits->vddci     [all...]
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_vega10_hwmgr.c	3183 const struct phm_clock_and_voltage_limits *max_limits; local in function:vega10_apply_state_adjust_rules 3199 max_limits = adev->pm.ac_power ? 3207 max_limits->mclk) 3209 max_limits->mclk; 3211 max_limits->sclk) 3213 max_limits->sclk; 3230 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); 3231 stable_pstate_sclk = (max_limits->sclk * 3247 stable_pstate_mclk = max_limits->mclk; 3272 sclk = (minimum_clocks.engineClock > max_limits->sclk) 4266 struct phm_clock_and_voltage_limits *max_limits = local in function:vega10_get_dal_power_level     [all...]
amdgpu_smu7_hwmgr.c	2902 const struct phm_clock_and_voltage_limits *max_limits; local in function:smu7_apply_state_adjust_rules 2917 max_limits = adev->pm.ac_power ? 2924 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) 2925 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; 2926 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) 2927 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; 2936 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); 2937 stable_pstate_sclk = (max_limits->sclk * 75) / 100; 2952 stable_pstate_mclk = max_limits->mclk; 2979 sclk = (minimum_clocks.engineClock > max_limits->sclk)     [all...]

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Indexes created Sun Sep 21 20:09:37 GMT 2025