1 /* $NetBSD: bus_space_defs.h,v 1.5 2023/03/28 10:54:13 nakayama Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996 Carnegie-Mellon University. 35 * All rights reserved. 36 * 37 * Author: Chris G. Demetriou 38 * 39 * Permission to use, copy, modify and distribute this software and 40 * its documentation is hereby granted, provided that both the copyright 41 * notice and this permission notice appear in all copies of the 42 * software, derivative works or modified versions, and any portions 43 * thereof, and that both notices appear in supporting documentation. 44 * 45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 48 * 49 * Carnegie Mellon requests users of this software to return to 50 * 51 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 52 * School of Computer Science 53 * Carnegie Mellon University 54 * Pittsburgh PA 15213-3890 55 * 56 * any improvements or extensions that they make and grant Carnegie the 57 * rights to redistribute these changes. 58 */ 59 60 #ifndef _MIPS_BUS_SPACE_DEFS_H_ 61 #define _MIPS_BUS_SPACE_DEFS_H_ 62 63 #include <sys/types.h> 64 65 #ifdef _KERNEL 66 67 #define __BUS_SPACE_HAS_STREAM_METHODS 1 68 69 /* 70 * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled. 71 */ 72 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG) 73 #define BUS_SPACE_DEBUG 74 #endif 75 76 #ifdef BUS_SPACE_DEBUG 77 #include <sys/systm.h> /* for printf() prototype */ 78 /* 79 * Macros for checking the aligned-ness of pointers passed to bus 80 * space ops. Strict alignment is required by the MIPS architecture, 81 * and a trap will occur if unaligned access is performed. These 82 * may aid in the debugging of a broken device driver by displaying 83 * useful information about the problem. 84 */ 85 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 86 ((((u_long)(p)) & (sizeof(t)-1)) == 0) 87 88 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 89 ({ \ 90 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 91 printf("%s 0x%lx not aligned to %lu bytes %s:%d\n", \ 92 d, (u_long)(p), (u_long)sizeof(t), \ 93 __FILE__, __LINE__); \ 94 } \ 95 (void) 0; \ 96 }) 97 98 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 99 #else 100 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) (void) 0 101 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 102 #endif /* BUS_SPACE_DEBUG */ 103 #endif /* _KERNEL */ 104 105 struct mips_bus_space_translation; 106 107 /* 108 * Addresses (in bus space). 109 */ 110 #ifdef __mips_n32 111 typedef int64_t bus_addr_t; 112 typedef uint64_t bus_size_t; 113 #define PRIxBUSADDR PRIx64 114 #define PRIxBUSSIZE PRIx64 115 #define PRIuBUSSIZE PRIu64 116 #else 117 typedef paddr_t bus_addr_t; 118 typedef psize_t bus_size_t; 119 #define PRIxBUSADDR PRIxPADDR 120 #define PRIxBUSSIZE PRIxPSIZE 121 #define PRIuBUSSIZE PRIuPSIZE 122 #endif 123 124 /* 125 * Access methods for bus space. 126 */ 127 typedef struct mips_bus_space *bus_space_tag_t; 128 /* 129 * If we are using the MIPS N32 ABI, allow bus_space_space_t to hold a 130 * 64-bit quantity which can hold an XKPHYS address. 131 */ 132 #if defined(__mips_n32) && defined(_MIPS_PADDR_T_64BIT) 133 typedef int64_t bus_space_handle_t; 134 #define PRIxBSH PRIx64 135 #else 136 typedef intptr_t bus_space_handle_t; 137 #define PRIxBSH PRIxPTR 138 #endif 139 140 struct mips_bus_space { 141 /* cookie */ 142 void *bs_cookie; 143 144 /* mapping/unmapping */ 145 int (*bs_map)(void *, bus_addr_t, bus_size_t, int, 146 bus_space_handle_t *, int); 147 void (*bs_unmap)(void *, bus_space_handle_t, bus_size_t, 148 int); 149 int (*bs_subregion)(void *, bus_space_handle_t, bus_size_t, 150 bus_size_t, bus_space_handle_t *); 151 152 /* MIPS SPECIFIC MAPPING METHOD */ 153 int (*bs_translate)(void *, bus_addr_t, bus_size_t, int, 154 struct mips_bus_space_translation *); 155 int (*bs_get_window)(void *, int, 156 struct mips_bus_space_translation *); 157 158 /* allocation/deallocation */ 159 int (*bs_alloc)(void *, bus_addr_t, bus_addr_t, 160 bus_size_t, bus_size_t, bus_size_t, int, 161 bus_addr_t *, bus_space_handle_t *); 162 void (*bs_free)(void *, bus_space_handle_t, bus_size_t); 163 164 /* get kernel virtual address */ 165 void * (*bs_vaddr)(void *, bus_space_handle_t); 166 167 /* mmap for user */ 168 paddr_t (*bs_mmap)(void *, bus_addr_t, off_t, int, int); 169 170 /* barrier */ 171 void (*bs_barrier)(void *, bus_space_handle_t, 172 bus_size_t, bus_size_t, int); 173 174 /* read (single) */ 175 uint8_t (*bs_r_1)(void *, bus_space_handle_t, bus_size_t); 176 uint16_t (*bs_r_2)(void *, bus_space_handle_t, bus_size_t); 177 uint32_t (*bs_r_4)(void *, bus_space_handle_t, bus_size_t); 178 uint64_t (*bs_r_8)(void *, bus_space_handle_t, bus_size_t); 179 180 /* read multiple */ 181 void (*bs_rm_1)(void *, bus_space_handle_t, bus_size_t, 182 uint8_t *, bus_size_t); 183 void (*bs_rm_2)(void *, bus_space_handle_t, bus_size_t, 184 uint16_t *, bus_size_t); 185 void (*bs_rm_4)(void *, bus_space_handle_t, bus_size_t, 186 uint32_t *, bus_size_t); 187 void (*bs_rm_8)(void *, bus_space_handle_t, bus_size_t, 188 uint64_t *, bus_size_t); 189 190 /* read region */ 191 void (*bs_rr_1)(void *, bus_space_handle_t, bus_size_t, 192 uint8_t *, bus_size_t); 193 void (*bs_rr_2)(void *, bus_space_handle_t, bus_size_t, 194 uint16_t *, bus_size_t); 195 void (*bs_rr_4)(void *, bus_space_handle_t, bus_size_t, 196 uint32_t *, bus_size_t); 197 void (*bs_rr_8)(void *, bus_space_handle_t, bus_size_t, 198 uint64_t *, bus_size_t); 199 200 /* write (single) */ 201 void (*bs_w_1)(void *, bus_space_handle_t, bus_size_t, 202 uint8_t); 203 void (*bs_w_2)(void *, bus_space_handle_t, bus_size_t, 204 uint16_t); 205 void (*bs_w_4)(void *, bus_space_handle_t, bus_size_t, 206 uint32_t); 207 void (*bs_w_8)(void *, bus_space_handle_t, bus_size_t, 208 uint64_t); 209 210 /* write multiple */ 211 void (*bs_wm_1)(void *, bus_space_handle_t, bus_size_t, 212 const uint8_t *, bus_size_t); 213 void (*bs_wm_2)(void *, bus_space_handle_t, bus_size_t, 214 const uint16_t *, bus_size_t); 215 void (*bs_wm_4)(void *, bus_space_handle_t, bus_size_t, 216 const uint32_t *, bus_size_t); 217 void (*bs_wm_8)(void *, bus_space_handle_t, bus_size_t, 218 const uint64_t *, bus_size_t); 219 220 /* write region */ 221 void (*bs_wr_1)(void *, bus_space_handle_t, bus_size_t, 222 const uint8_t *, bus_size_t); 223 void (*bs_wr_2)(void *, bus_space_handle_t, bus_size_t, 224 const uint16_t *, bus_size_t); 225 void (*bs_wr_4)(void *, bus_space_handle_t, bus_size_t, 226 const uint32_t *, bus_size_t); 227 void (*bs_wr_8)(void *, bus_space_handle_t, bus_size_t, 228 const uint64_t *, bus_size_t); 229 230 /* read (single) stream */ 231 uint8_t (*bs_rs_1)(void *, bus_space_handle_t, bus_size_t); 232 uint16_t (*bs_rs_2)(void *, bus_space_handle_t, bus_size_t); 233 uint32_t (*bs_rs_4)(void *, bus_space_handle_t, bus_size_t); 234 uint64_t (*bs_rs_8)(void *, bus_space_handle_t, bus_size_t); 235 236 /* read multiple stream */ 237 void (*bs_rms_1)(void *, bus_space_handle_t, bus_size_t, 238 uint8_t *, bus_size_t); 239 void (*bs_rms_2)(void *, bus_space_handle_t, bus_size_t, 240 uint16_t *, bus_size_t); 241 void (*bs_rms_4)(void *, bus_space_handle_t, bus_size_t, 242 uint32_t *, bus_size_t); 243 void (*bs_rms_8)(void *, bus_space_handle_t, bus_size_t, 244 uint64_t *, bus_size_t); 245 246 /* read region stream */ 247 void (*bs_rrs_1)(void *, bus_space_handle_t, bus_size_t, 248 uint8_t *, bus_size_t); 249 void (*bs_rrs_2)(void *, bus_space_handle_t, bus_size_t, 250 uint16_t *, bus_size_t); 251 void (*bs_rrs_4)(void *, bus_space_handle_t, bus_size_t, 252 uint32_t *, bus_size_t); 253 void (*bs_rrs_8)(void *, bus_space_handle_t, bus_size_t, 254 uint64_t *, bus_size_t); 255 256 /* write (single) stream */ 257 void (*bs_ws_1)(void *, bus_space_handle_t, bus_size_t, 258 uint8_t); 259 void (*bs_ws_2)(void *, bus_space_handle_t, bus_size_t, 260 uint16_t); 261 void (*bs_ws_4)(void *, bus_space_handle_t, bus_size_t, 262 uint32_t); 263 void (*bs_ws_8)(void *, bus_space_handle_t, bus_size_t, 264 uint64_t); 265 266 /* write multiple stream */ 267 void (*bs_wms_1)(void *, bus_space_handle_t, bus_size_t, 268 const uint8_t *, bus_size_t); 269 void (*bs_wms_2)(void *, bus_space_handle_t, bus_size_t, 270 const uint16_t *, bus_size_t); 271 void (*bs_wms_4)(void *, bus_space_handle_t, bus_size_t, 272 const uint32_t *, bus_size_t); 273 void (*bs_wms_8)(void *, bus_space_handle_t, bus_size_t, 274 const uint64_t *, bus_size_t); 275 276 /* write region stream */ 277 void (*bs_wrs_1)(void *, bus_space_handle_t, bus_size_t, 278 const uint8_t *, bus_size_t); 279 void (*bs_wrs_2)(void *, bus_space_handle_t, bus_size_t, 280 const uint16_t *, bus_size_t); 281 void (*bs_wrs_4)(void *, bus_space_handle_t, bus_size_t, 282 const uint32_t *, bus_size_t); 283 void (*bs_wrs_8)(void *, bus_space_handle_t, bus_size_t, 284 const uint64_t *, bus_size_t); 285 286 /* set multiple */ 287 void (*bs_sm_1)(void *, bus_space_handle_t, bus_size_t, 288 uint8_t, bus_size_t); 289 void (*bs_sm_2)(void *, bus_space_handle_t, bus_size_t, 290 uint16_t, bus_size_t); 291 void (*bs_sm_4)(void *, bus_space_handle_t, bus_size_t, 292 uint32_t, bus_size_t); 293 void (*bs_sm_8)(void *, bus_space_handle_t, bus_size_t, 294 uint64_t, bus_size_t); 295 296 /* set region */ 297 void (*bs_sr_1)(void *, bus_space_handle_t, bus_size_t, 298 uint8_t, bus_size_t); 299 void (*bs_sr_2)(void *, bus_space_handle_t, bus_size_t, 300 uint16_t, bus_size_t); 301 void (*bs_sr_4)(void *, bus_space_handle_t, bus_size_t, 302 uint32_t, bus_size_t); 303 void (*bs_sr_8)(void *, bus_space_handle_t, bus_size_t, 304 uint64_t, bus_size_t); 305 306 /* copy */ 307 void (*bs_c_1)(void *, bus_space_handle_t, bus_size_t, 308 bus_space_handle_t, bus_size_t, bus_size_t); 309 void (*bs_c_2)(void *, bus_space_handle_t, bus_size_t, 310 bus_space_handle_t, bus_size_t, bus_size_t); 311 void (*bs_c_4)(void *, bus_space_handle_t, bus_size_t, 312 bus_space_handle_t, bus_size_t, bus_size_t); 313 void (*bs_c_8)(void *, bus_space_handle_t, bus_size_t, 314 bus_space_handle_t, bus_size_t, bus_size_t); 315 }; 316 317 /* 318 * Translation of an MIPS bus address; INTERNAL USE ONLY. 319 */ 320 struct mips_bus_space_translation { 321 bus_addr_t mbst_bus_start; /* start of bus window */ 322 bus_addr_t mbst_bus_end; /* end of bus window */ 323 paddr_t mbst_sys_start; /* start of sysBus window */ 324 paddr_t mbst_sys_end; /* end of sysBus window */ 325 int mbst_align_stride;/* alignment stride */ 326 int mbst_flags; /* flags; see below */ 327 }; 328 329 #define BUS_SPACE_MAP_CACHEABLE 0x01 330 #define BUS_SPACE_MAP_LINEAR 0x02 331 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 332 333 #ifdef _KERNEL 334 335 #define BUS_SPACE_BARRIER_READ 0x01 336 #define BUS_SPACE_BARRIER_WRITE 0x02 337 338 #endif /* _KERNEL */ 339 340 #endif /* _MIPS_BUS_SPACE_DEFS_H_ */ 341
Indexes created Sat Sep 20 22:09:52 GMT 2025