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    Searched defs:msr (Results 1 - 25 of 89) sorted by relevancy

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  /src/sys/arch/powerpc/pic/
ipi.c 61 int msr; local
86 msr = (mfmsr() & ~PSL_EE) | PSL_POW;
89 mtmsr(msr);
  /src/sys/arch/powerpc/ibm4xx/
copyinstr.c 51 int rv, msr, pid, tmp, ctx; local
76 "mfmsr %[msr];" /* Save MSR */
78 "andc %[tmp],%[msr],%[tmp];"
97 "mtmsr %[msr];" /* Restore MSR */
101 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp),
copyoutstr.c 51 int rv, msr, pid, tmp, ctx; local
76 "mfmsr %[msr];" /* Save MSR */
78 "andc %[tmp],%[msr],%[tmp];"
98 "mtmsr %[msr];" /* Restore MSR */
102 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp),
ibm4xx_machdep.c 330 int msr; local
336 __asm volatile ("mfmsr %0; wrteei 0" : "=r" (msr));
341 __asm volatile ("mtmsr %0" :: "r" (msr));
  /src/sys/arch/rs6000/stand/boot/
io.c 18 register_t savemsr, msr; local
21 msr = savemsr & ~PSL_DR;
22 __asm volatile ("mtmsr %0" : : "r"(msr));
25 __asm volatile ("mtmsr %0" : : "r"(msr|PSL_DR));
ns16550.h 44 volatile unsigned char msr; /* 6 */ member in struct:NS16550
  /src/sys/arch/x86/include/
cpu_msr.h 47 uint64_t msr = 0; local
51 /* Read the MSR requested and apply the mask if defined. */
53 msr = rdmsr(msrdat->msr_type);
55 msr &= ~msrdat->msr_mask;
59 msr |= msrdat->msr_value;
60 wrmsr(msrdat->msr_type, msr);
  /src/sys/arch/x86/x86/
intel_busclock.c 50 uint64_t msr; local
53 msr = rdmsr(MSR_EBL_CR_POWERON);
54 bus = (msr >> 18) & 0x3;
78 uint64_t msr; local
81 msr = rdmsr(MSR_PERF_STATUS);
82 mult = (msr >> 8) & 0xff;
93 uint64_t msr; local
108 if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
113 bus = (msr >> 0) & 0x7;
125 if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT)
333 uint64_t msr; local
    [all...]
viac7temp.c 159 uint64_t msr; local
161 if (rdmsr_safe(sc->sc_temp_msr, &msr) == EFAULT) {
169 edata->value_cur = msr & 0xffffff;
  /src/lib/libc/arch/powerpc/gen/
fpsetmask.c 54 uint32_t msr; local
56 __asm volatile ("mfmsr %0" : "=r"(msr));
57 return msr;
61 mtmsr(uint32_t msr)
64 __asm volatile ("mtmsr %0" : : "r"(msr));
77 uint32_t msr; local
86 msr = mfmsr();
87 msr = (msr & ~(PSL_FE0 | PSL_FE1)) |
89 mtmsr(msr);
    [all...]
  /src/sys/arch/powerpc/booke/
spe.c 90 const register_t msr = mfmsr(); local
91 mtmsr((msr & ~PSL_EE) | PSL_SPV);
102 * Restore MSR (turn off SPE)
104 mtmsr(msr);
121 const register_t msr = mfmsr(); local
122 mtmsr((msr & ~PSL_EE) | PSL_SPV);
132 * Restore MSR (turn off SPE)
134 mtmsr(msr);
copyin.c 54 register_t msr; local
57 "mfmsr %[msr]; " /* Save MSR */
60 "mtmsr %[msr]; sync; isync; " /* DS off */
61 : [msr] "=&r" (msr), [data] "=r" (data)
69 register_t msr; local
72 "mfmsr %[msr]; " /* Save MSR */
75 "mtmsr %[msr]; sync; isync; " /* DS off *
84 register_t msr; local
99 register_t msr; local
114 register_t msr; local
139 register_t msr; local
    [all...]
  /src/sys/arch/powerpc/powerpc/
kgdb_machdep.c 86 u_int msr; local
95 __asm volatile ("mfmsr %0" : "=r"(msr));
96 if ((msr & PSL_DR) == 0) {
127 if (BAT_VALID_P(batu,msr) &&
133 if (BAT_VALID_P(batu,msr) &&
139 if (BAT_VALID_P(batu,msr) &&
145 if (BAT_VALID_P(batu,msr) &&
264 gdb_regs[KGDB_PPC_MSR_REG] = regs->msr;
281 regs->msr = gdb_regs[KGDB_PPC_MSR_REG];
clock.c 106 uint32_t msr; local
123 : "=r"(msr) : "K"(PSL_EE|PSL_RI));
142 const register_t msr = mfmsr(); local
184 mtmsr(msr | PSL_EE);
192 mtmsr(msr);
195 mtmsr(msr | PSL_EE);
197 mtmsr(msr);
260 int msr, scratch; local
263 : "=r"(msr), "=r"(scratch) : "K"((u_short)~PSL_EE));
266 mtmsr(msr);
276 int msr, scratch; local
    [all...]
fpu.c 82 const register_t msr = mfmsr(); local
83 mtmsr((msr & ~PSL_EE) | PSL_FP);
89 mtmsr(msr);
107 const register_t msr = mfmsr(); local
108 mtmsr((msr & ~PSL_EE) | PSL_FP);
114 mtmsr(msr);
153 const register_t msr = mfmsr(); local
154 mtmsr((msr & ~PSL_EE) | PSL_FP);
172 mtmsr(msr);
  /src/sys/dev/mii/
urlphy.c 229 uint16_t msr, bmsr, bmcr; local
238 * so we need to read the MSR register to get link status.
240 PHY_READ(sc, URLPHY_MSR, &msr);
241 PHY_READ(sc, URLPHY_MSR, &msr);
242 if (msr & URLPHY_MSR_LINK)
258 if (msr & URLPHY_MSR_SPEED_100)
263 if (msr & URLPHY_MSR_DUPLEX)
  /src/sys/arch/ibmnws/ibmnws/
machdep.c 182 int msr; local
186 : "=r"(msr) : "K"(PSL_EE));
239 int msr; local
242 __asm volatile("mfmsr %0" : "=r"(msr));
243 msr |= PSL_IP;
244 __asm volatile("mtmsr %0" :: "r"(msr));
  /src/sys/arch/mvmeppc/mvmeppc/
machdep.c 181 int msr; local
185 : "=r"(msr) : "K"(PSL_EE));
  /src/sys/arch/powerpc/oea/
altivec.c 87 const register_t msr = mfmsr(); local
88 mtmsr((msr & ~PSL_EE) | PSL_VEC);
98 * Restore MSR (turn off AltiVec)
100 mtmsr(msr);
124 const register_t msr = mfmsr(); local
125 mtmsr((msr & ~PSL_EE) | PSL_VEC);
145 * Restore MSR (turn off AltiVec)
147 mtmsr(msr);
216 register_t omsr, msr; local
223 msr = (omsr & ~PSL_EE) | PSL_VEC
276 register_t omsr, msr; local
    [all...]
  /src/sys/arch/bebox/stand/boot/
ns16550.h 45 unsigned char msr; /* 6 */ member in struct:NS16550
  /src/sys/arch/powerpc/ibm4xx/dev/
ecc_plb.c 144 u_long tmp, msr, dat; local
228 : "=&r" (msr), "=&r" (tmp), "=&r" (dat)
266 : "=&r" (msr), "=&r" (tmp), "=&r" (dat)
  /src/sys/arch/prep/stand/boot/
ns16550.h 44 volatile unsigned char msr; /* 6 */ member in struct:NS16550
  /src/sys/arch/cesfic/cesfic/
dp8570a.h 4 u_int8_t msr; member in struct:dp8570reg
  /src/sys/arch/evbppc/pmppc/dev/
if_cs_mainbus.c 88 u_int32_t msr, nmsr;
90 __asm volatile("mfmsr %0" : "=r"(msr));
91 nmsr = (msr | PSL_FP) & ~(PSL_FE0 | PSL_FE1);
103 __asm volatile("mtmsr %0" :: "r"(msr));
116 u_int32_t msr, nmsr; local
121 __asm volatile("mfmsr %0" : "=r"(msr));
122 nmsr = (msr | PSL_FP) & ~(PSL_FE0 | PSL_FE1);
134 __asm volatile("mtmsr %0" :: "r"(msr));
194 u_int32_t msr, nmsr; local
200 __asm volatile("mfmsr %0" : "=r"(msr));
    [all...]
  /src/sys/arch/i386/i386/
longrun.c 70 uint64_t msr; member in union:msrinfo
80 /* MSR low, MSR high, flags bit0 */
95 uint64_t msr; local
97 /* PR #32894, make sure the longrun MSR is present */
98 if (rdmsr_safe(MSR_TMx86_LONGRUN, &msr) == EFAULT)
138 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
186 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
191 wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr);
194 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN_FLAGS)
    [all...]

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