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      1 /*	$NetBSD: octeon_ipd.c,v 1.8 2021/01/04 17:22:59 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2007 Internet Initiative Japan, Inc.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: octeon_ipd.c,v 1.8 2021/01/04 17:22:59 thorpej Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/systm.h>
     34 #include <sys/kmem.h>
     35 #include <sys/mbuf.h>
     36 #include <mips/locore.h>
     37 #include <mips/cavium/octeonvar.h>
     38 #include <mips/cavium/dev/octeon_ciureg.h>
     39 #include <mips/cavium/dev/octeon_fpareg.h>
     40 #include <mips/cavium/dev/octeon_fpavar.h>
     41 #include <mips/cavium/dev/octeon_pipreg.h>
     42 #include <mips/cavium/dev/octeon_ipdreg.h>
     43 #include <mips/cavium/dev/octeon_ipdvar.h>
     44 
     45 #include <netinet/in.h>
     46 #include <netinet/in_systm.h>
     47 #include <netinet/ip.h>
     48 
     49 #define IP_OFFSET(data, word2) \
     50 	((uintptr_t)(data) + (uintptr_t)__SHIFTOUT(word2, PIP_WQE_WORD2_IP_OFFSET))
     51 
     52 /* XXX */
     53 void
     54 octipd_init(struct octipd_attach_args *aa, struct octipd_softc **rsc)
     55 {
     56 	struct octipd_softc *sc;
     57 	int status;
     58 
     59 	sc = kmem_zalloc(sizeof(*sc), KM_SLEEP);
     60 	sc->sc_port = aa->aa_port;
     61 	sc->sc_regt = aa->aa_regt;
     62 	sc->sc_first_mbuff_skip = aa->aa_first_mbuff_skip;
     63 	sc->sc_not_first_mbuff_skip = aa->aa_not_first_mbuff_skip;
     64 
     65 	status = bus_space_map(sc->sc_regt, IPD_BASE, IPD_SIZE, 0,
     66 	    &sc->sc_regh);
     67 	if (status != 0)
     68 		panic("can't map %s space", "ipd register");
     69 
     70 	*rsc = sc;
     71 }
     72 
     73 #define	_IPD_RD8(sc, off) \
     74 	bus_space_read_8((sc)->sc_regt, (sc)->sc_regh, (off))
     75 #define	_IPD_WR8(sc, off, v) \
     76 	bus_space_write_8((sc)->sc_regt, (sc)->sc_regh, (off), (v))
     77 
     78 int
     79 octipd_enable(struct octipd_softc *sc)
     80 {
     81 	uint64_t ctl_status;
     82 
     83 	ctl_status = _IPD_RD8(sc, IPD_CTL_STATUS_OFFSET);
     84 	SET(ctl_status, IPD_CTL_STATUS_IPD_EN);
     85 	_IPD_WR8(sc, IPD_CTL_STATUS_OFFSET, ctl_status);
     86 
     87 	return 0;
     88 }
     89 
     90 int
     91 octipd_config(struct octipd_softc *sc)
     92 {
     93 	uint64_t first_mbuff_skip;
     94 	uint64_t not_first_mbuff_skip;
     95 	uint64_t packet_mbuff_size;
     96 	uint64_t first_next_ptr_back;
     97 	uint64_t second_next_ptr_back;
     98 	uint64_t sqe_fpa_queue;
     99 	uint64_t ctl_status;
    100 
    101 	/* XXX XXX XXX */
    102 	first_mbuff_skip = 0;
    103 	SET(first_mbuff_skip, (sc->sc_first_mbuff_skip / 8) & IPD_1ST_MBUFF_SKIP_SZ);
    104 	_IPD_WR8(sc, IPD_1ST_MBUFF_SKIP_OFFSET, first_mbuff_skip);
    105 	/* XXX XXX XXX */
    106 
    107 	/* XXX XXX XXX */
    108 	not_first_mbuff_skip = 0;
    109 	SET(not_first_mbuff_skip, (sc->sc_not_first_mbuff_skip / 8) &
    110 	    IPD_NOT_1ST_MBUFF_SKIP_SZ);
    111 	_IPD_WR8(sc, IPD_NOT_1ST_MBUFF_SKIP_OFFSET, not_first_mbuff_skip);
    112 	/* XXX XXX XXX */
    113 
    114 	packet_mbuff_size = 0;
    115 	SET(packet_mbuff_size, (FPA_RECV_PKT_POOL_SIZE / 8) &
    116 	    IPD_PACKET_MBUFF_SIZE_MB_SIZE);
    117 	_IPD_WR8(sc, IPD_PACKET_MBUFF_SIZE_OFFSET, packet_mbuff_size);
    118 
    119 	first_next_ptr_back = 0;
    120 	SET(first_next_ptr_back, (sc->sc_first_mbuff_skip / 128) & IPD_1ST_NEXT_PTR_BACK_BACK);
    121 	_IPD_WR8(sc, IPD_1ST_NEXT_PTR_BACK_OFFSET, first_next_ptr_back);
    122 
    123 	second_next_ptr_back = 0;
    124 	SET(second_next_ptr_back, (sc->sc_not_first_mbuff_skip / 128) &
    125 	    IPD_2ND_NEXT_PTR_BACK_BACK);
    126 	_IPD_WR8(sc, IPD_2ND_NEXT_PTR_BACK_OFFSET, second_next_ptr_back);
    127 
    128 	sqe_fpa_queue = 0;
    129 	SET(sqe_fpa_queue, FPA_WQE_POOL & IPD_WQE_FPA_QUEUE_WQE_QUE);
    130 	_IPD_WR8(sc, IPD_WQE_FPA_QUEUE_OFFSET, sqe_fpa_queue);
    131 
    132 	ctl_status = _IPD_RD8(sc, IPD_CTL_STATUS_OFFSET);
    133 	CLR(ctl_status, IPD_CTL_STATUS_OPC_MODE);
    134 	SET(ctl_status,
    135 	    __SHIFTIN(IPD_CTL_STATUS_OPC_MODE_ALL, IPD_CTL_STATUS_OPC_MODE));
    136 	SET(ctl_status, IPD_CTL_STATUS_PBP_EN);
    137 
    138 	/*
    139 	* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    140 	*          from SDK
    141 	* SET(ctl_status, IPD_CTL_STATUS_LEN_M8);
    142         * XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    143 	*/
    144 
    145 	_IPD_WR8(sc, IPD_CTL_STATUS_OFFSET, ctl_status);
    146 
    147 	return 0;
    148 }
    149 
    150 /*
    151  * octeon work queue entry offload
    152  * L3 error & L4 error
    153  */
    154 void
    155 octipd_offload(uint64_t word2, void *data, int *rcflags)
    156 {
    157 	int cflags;
    158 
    159 	if (ISSET(word2, PIP_WQE_WORD2_IP_NI))
    160 		return;
    161 
    162 	cflags = 0;
    163 
    164 	if (!ISSET(word2, PIP_WQE_WORD2_IP_V6))
    165 		SET(cflags, M_CSUM_IPv4);
    166 
    167 	if (ISSET(word2, PIP_WQE_WORD2_IP_TU)) {
    168 		SET(cflags,
    169 		    !ISSET(word2, PIP_WQE_WORD2_IP_V6) ?
    170 		    (M_CSUM_TCPv4 | M_CSUM_UDPv4) :
    171 		    (M_CSUM_TCPv6 | M_CSUM_UDPv6));
    172 	}
    173 
    174 	/* check L3 (IP) error */
    175 	if (ISSET(word2, PIP_WQE_WORD2_IP_IE)) {
    176 		struct ip *ip;
    177 
    178 		switch (word2 & PIP_WQE_WORD2_IP_OPECODE) {
    179 		case IPD_WQE_L3_V4_CSUM_ERR:
    180 			/* CN31XX Pass 1.1 Errata */
    181 			ip = (struct ip *)(IP_OFFSET(data, word2));
    182 			if (ip->ip_hl == 5)
    183 				SET(cflags, M_CSUM_IPv4_BAD);
    184 			break;
    185 		default:
    186 			break;
    187 		}
    188 	}
    189 
    190 	/* check L4 (UDP / TCP) error */
    191 	if (ISSET(word2, PIP_WQE_WORD2_IP_LE)) {
    192 		switch (word2 & PIP_WQE_WORD2_IP_OPECODE) {
    193 		case IPD_WQE_L4_CSUM_ERR:
    194 			SET(cflags, M_CSUM_TCP_UDP_BAD);
    195 			break;
    196 		default:
    197 			break;
    198 		}
    199 	}
    200 
    201 	*rcflags = cflags;
    202 }
    203 
    204 void
    205 octipd_sub_port_fcs(struct octipd_softc *sc, int enable)
    206 {
    207 	uint64_t sub_port_fcs;
    208 
    209 	sub_port_fcs = _IPD_RD8(sc, IPD_SUB_PORT_FCS_OFFSET);
    210 	if (enable == 0)
    211 		CLR(sub_port_fcs, __BIT(sc->sc_port));
    212 	else
    213 		SET(sub_port_fcs, __BIT(sc->sc_port));
    214 	_IPD_WR8(sc, IPD_SUB_PORT_FCS_OFFSET, sub_port_fcs);
    215 }
    216