1 /* $NetBSD: octeon_pko.c,v 1.7 2021/09/17 08:13:06 andvar Exp $ */ 2 3 /* 4 * Copyright (c) 2007 Internet Initiative Japan, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: octeon_pko.c,v 1.7 2021/09/17 08:13:06 andvar Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kmem.h> 35 #include <mips/locore.h> 36 #include <mips/cavium/octeonvar.h> 37 #include <mips/cavium/dev/octeon_faureg.h> 38 #include <mips/cavium/dev/octeon_fpareg.h> 39 #include <mips/cavium/dev/octeon_fpavar.h> 40 #include <mips/cavium/dev/octeon_pkoreg.h> 41 #include <mips/cavium/dev/octeon_pkovar.h> 42 43 static inline void octpko_op_store(uint64_t, uint64_t); 44 45 #define _PKO_RD8(sc, off) \ 46 bus_space_read_8((sc)->sc_regt, (sc)->sc_regh, (off)) 47 #define _PKO_WR8(sc, off, v) \ 48 bus_space_write_8((sc)->sc_regt, (sc)->sc_regh, (off), (v)) 49 50 /* ----- gloal functions */ 51 52 /* XXX */ 53 void 54 octpko_init(struct octpko_attach_args *aa, struct octpko_softc **rsc) 55 { 56 struct octpko_softc *sc; 57 int status; 58 59 sc = kmem_zalloc(sizeof(*sc), KM_SLEEP); 60 sc->sc_port = aa->aa_port; 61 sc->sc_regt = aa->aa_regt; 62 sc->sc_cmdptr = aa->aa_cmdptr; 63 sc->sc_cmd_buf_pool = aa->aa_cmd_buf_pool; 64 sc->sc_cmd_buf_size = aa->aa_cmd_buf_size; 65 66 status = bus_space_map(sc->sc_regt, PKO_BASE, PKO_SIZE, 0, 67 &sc->sc_regh); 68 if (status != 0) 69 panic("can't map %s space", "pko register"); 70 71 *rsc = sc; 72 } 73 74 int 75 octpko_enable(struct octpko_softc *sc) 76 { 77 uint64_t reg_flags; 78 79 reg_flags = _PKO_RD8(sc, PKO_REG_FLAGS_OFFSET); 80 /* PKO_REG_FLAGS_RESET=0 */ 81 /* PKO_REG_FLAGS_STORE_BE=0 */ 82 SET(reg_flags, PKO_REG_FLAGS_ENA_DWB); 83 SET(reg_flags, PKO_REG_FLAGS_ENA_PKO); 84 /* XXX */ 85 OCTEON_SYNCW; 86 _PKO_WR8(sc, PKO_REG_FLAGS_OFFSET, reg_flags); 87 88 return 0; 89 } 90 91 void 92 octpko_config(struct octpko_softc *sc) 93 { 94 uint64_t reg_cmd_buf = 0; 95 96 SET(reg_cmd_buf, __SHIFTIN(sc->sc_cmd_buf_pool, PKO_REG_CMD_BUF_POOL)); 97 SET(reg_cmd_buf, __SHIFTIN(sc->sc_cmd_buf_size, PKO_REG_CMD_BUF_SIZE)); 98 _PKO_WR8(sc, PKO_REG_CMD_BUF_OFFSET, reg_cmd_buf); 99 } 100 101 int 102 octpko_port_enable(struct octpko_softc *sc, int enable) 103 { 104 uint64_t reg_read_idx; 105 uint64_t mem_queue_qos; 106 107 reg_read_idx = 0; 108 SET(reg_read_idx, sc->sc_port & PKO_REG_READ_IDX_IDX); 109 110 /* XXX assume one queue mapped one port */ 111 /* Enable packet output by enabling all queues for this port */ 112 mem_queue_qos = 0; 113 SET(mem_queue_qos, __SHIFTIN(sc->sc_port, PKO_MEM_QUEUE_QOS_PID)); 114 SET(mem_queue_qos, __SHIFTIN(sc->sc_port, PKO_MEM_QUEUE_QOS_QID)); 115 SET(mem_queue_qos, enable ? PKO_MEM_QUEUE_QOS_QOS_MASK : 0); 116 117 _PKO_WR8(sc, PKO_REG_READ_IDX_OFFSET, reg_read_idx); 118 _PKO_WR8(sc, PKO_MEM_QUEUE_QOS_OFFSET, mem_queue_qos); 119 120 return 0; 121 } 122 123 static int pko_queue_map_init[32]; 124 125 int 126 octpko_port_config(struct octpko_softc *sc) 127 { 128 paddr_t buf_ptr = 0; 129 uint64_t mem_queue_ptrs; 130 131 KASSERT(sc->sc_port < 32); 132 133 buf_ptr = octfpa_load(FPA_COMMAND_BUFFER_POOL); 134 if (buf_ptr == 0) 135 return 1; 136 137 KASSERT(buf_ptr != 0); 138 139 /* assume one queue mapped one port */ 140 mem_queue_ptrs = 0; 141 SET(mem_queue_ptrs, PKO_MEM_QUEUE_PTRS_TAIL); 142 SET(mem_queue_ptrs, __SHIFTIN(0, PKO_MEM_QUEUE_PTRS_IDX)); 143 SET(mem_queue_ptrs, __SHIFTIN(sc->sc_port, PKO_MEM_QUEUE_PTRS_PID)); 144 SET(mem_queue_ptrs, __SHIFTIN(sc->sc_port, PKO_MEM_QUEUE_PTRS_QID)); 145 SET(mem_queue_ptrs, __SHIFTIN(0xff, PKO_MEM_QUEUE_PTRS_QOS_MASK)); 146 SET(mem_queue_ptrs, __SHIFTIN(buf_ptr, PKO_MEM_QUEUE_PTRS_BUF_PTR)); 147 OCTEON_SYNCW; 148 _PKO_WR8(sc, PKO_MEM_QUEUE_PTRS_OFFSET, mem_queue_ptrs); 149 150 /* 151 * Set initial command buffer address and index 152 * for queue. 153 */ 154 sc->sc_cmdptr->cmdptr = (uint64_t)buf_ptr; 155 sc->sc_cmdptr->cmdptr_idx = 0; 156 157 pko_queue_map_init[sc->sc_port] = 1; 158 159 return 0; 160 } 161
Indexes created Thu Sep 25 16:09:42 GMT 2025