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      1 /* $NetBSD: opb.c,v 1.29 2021/08/07 16:19:03 thorpej Exp $ */
      2 
      3 /*
      4  * Copyright 2001,2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *      This product includes software developed for the NetBSD Project by
     20  *      Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 /*
     39  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
     40  *
     41  * Redistribution and use in source and binary forms, with or without
     42  * modification, are permitted provided that the following conditions
     43  * are met:
     44  * 1. Redistributions of source code must retain the above copyright
     45  *    notice, this list of conditions and the following disclaimer.
     46  * 2. Redistributions in binary form must reproduce the above copyright
     47  *    notice, this list of conditions and the following disclaimer in the
     48  *    documentation and/or other materials provided with the distribution.
     49  * 3. All advertising materials mentioning features or use of this software
     50  *    must display the following acknowledgement:
     51  *      This product includes software developed by Christopher G. Demetriou
     52  *	for the NetBSD Project.
     53  * 4. The name of the author may not be used to endorse or promote products
     54  *    derived from this software without specific prior written permission
     55  *
     56  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     57  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     58  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     59  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     60  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     61  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     62  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     63  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     64  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     65  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     66  */
     67 
     68 #include <sys/cdefs.h>
     69 __KERNEL_RCSID(0, "$NetBSD: opb.c,v 1.29 2021/08/07 16:19:03 thorpej Exp $");
     70 
     71 #include "locators.h"
     72 
     73 #ifdef _KERNEL_OPT
     74 #include "opt_emac.h"
     75 #endif
     76 
     77 #include <sys/param.h>
     78 #include <sys/systm.h>
     79 #include <sys/device.h>
     80 #include <sys/extent.h>
     81 #include <sys/cpu.h>
     82 
     83 #include <powerpc/ibm4xx/cpu.h>
     84 #include <powerpc/ibm4xx/dcr4xx.h>
     85 
     86 #include <powerpc/ibm4xx/dev/opbreg.h>
     87 #include <powerpc/ibm4xx/dev/opbvar.h>
     88 #include <powerpc/ibm4xx/dev/plbvar.h>
     89 #include <powerpc/ibm4xx/dev/rgmiireg.h>
     90 #include <powerpc/ibm4xx/dev/zmiireg.h>
     91 
     92 #include <powerpc/spr.h>
     93 #include <powerpc/ibm4xx/spr.h>
     94 
     95 #include <powerpc/ibm4xx/ibm405gp.h>
     96 #include <powerpc/ibm4xx/amcc405ex.h>
     97 
     98 static int opb_get_frequency_405gp(void);
     99 static int opb_get_frequency_405ex(void);
    100 
    101 
    102 /*
    103  * The devices on the On-chip Peripheral Bus to the 405GP/EX CPU.
    104  */
    105 const struct opb_dev {
    106 	int pvr;
    107 	const char *name;
    108 	bus_addr_t addr;
    109 	int instance;
    110 	int irq;
    111 	int flags;
    112 } opb_devs [] = {
    113 	/* IBM405GP */
    114 	{ IBM405GP,	"com",	IBM405GP_UART0_BASE,	0,  0, 0 },
    115 	{ IBM405GP,	"com",	IBM405GP_UART1_BASE,	1,  1, 0 },
    116 	{ IBM405GP,	"emac",	IBM405GP_EMAC0_BASE,	0, 15, 0 },
    117 	{ IBM405GP,	"opbgpio",	IBM405GP_GPIO0_BASE,	0, -1, 0 },
    118 	{ IBM405GP,	"gpiic",IBM405GP_IIC0_BASE,	0,  2, 0 },
    119 	{ IBM405GP,	"wdog",	-1,	        	0, -1, 0 },
    120 
    121 	/* IBM405GPR */
    122 	{ IBM405GPR,	"com",	IBM405GP_UART0_BASE,	0,  0, 0 },
    123 	{ IBM405GPR,	"com",	IBM405GP_UART1_BASE,	1,  1, 0 },
    124 	{ IBM405GPR,	"emac",	IBM405GP_EMAC0_BASE,	0, 15, 0 },
    125 	{ IBM405GPR,	"opbgpio",	IBM405GP_GPIO0_BASE,	0, -1, 0 },
    126 	{ IBM405GPR,	"gpiic",IBM405GP_IIC0_BASE,	0,  2, 0 },
    127 	{ IBM405GPR,	"wdog",	-1,	        	0, -1, 0 },
    128 
    129 	/* AMCC405EX */
    130 	{ AMCC405EX,	"gpt",	AMCC405EX_GPT0_BASE,	 0, -1, 0 },
    131 	{ AMCC405EX,	"com",	AMCC405EX_UART0_BASE,	 0, 26, 0 },
    132 	{ AMCC405EX,	"com",	AMCC405EX_UART1_BASE,	 1,  1, 0 },
    133 	{ AMCC405EX,	"gpiic",AMCC405EX_IIC0_BASE,	 0,  2, 0 },
    134 	{ AMCC405EX,	"gpiic",AMCC405EX_IIC1_BASE,	 1,  7, 0 },
    135 	{ AMCC405EX,	"scp",	AMCC405EX_SCP0_BASE,	 0,  8, 0 }, /* SPI */
    136 	{ AMCC405EX,	"opbgpio",	AMCC405EX_GPIO0_BASE,	-1, -1, 0 },
    137 	{ AMCC405EX,	"emac",	AMCC405EX_EMAC0_BASE,	 0, 24,
    138 	    OPB_FLAGS_EMAC_GBE | OPB_FLAGS_EMAC_STACV2 | OPB_FLAGS_EMAC_HT256 |\
    139 	    OPB_FLAGS_EMAC_RMII_RGMII },
    140 	{ AMCC405EX,	"emac",	AMCC405EX_EMAC1_BASE,	 1, 25,
    141 	    OPB_FLAGS_EMAC_GBE | OPB_FLAGS_EMAC_STACV2 | OPB_FLAGS_EMAC_HT256 |\
    142 	    OPB_FLAGS_EMAC_RMII_RGMII },
    143 	{ AMCC405EX,	"wdog",	-1,			 0, -1, 0 },
    144 
    145 	{ 0,		 NULL }
    146 };
    147 
    148 int (*opb_get_frequency)(void);
    149 const struct opb_param {
    150 	int pvr;
    151 	bus_addr_t base;
    152 	bus_addr_t limit;
    153 	int (*opb_get_frequency)(void);
    154 	bus_addr_t zmii_base;
    155 	bus_addr_t rgmii_base;
    156 } opb_params[] = {
    157 	{ IBM405GP,
    158 	    IBM405GP_IP_BASE,	IBM405GP_IP_BASE + OPBREG_SIZE,
    159 	    opb_get_frequency_405gp,
    160 	    0,				0 },
    161 	{ IBM405GPR,
    162 	    IBM405GP_IP_BASE,	IBM405GP_IP_BASE + OPBREG_SIZE,
    163 	    opb_get_frequency_405gp,
    164 	    0,				0 },
    165 	{ AMCC405EX,
    166 	    AMCC405EX_OPB_BASE,	AMCC405EX_OPB_BASE + OPBREG_SIZE,
    167 	    opb_get_frequency_405ex,
    168 	    0,				AMCC405EX_RGMIIB0_BASE},
    169 
    170 	{ 0 }
    171 };
    172 
    173 static int	opb_match(device_t, cfdata_t, void *);
    174 static void	opb_attach(device_t, device_t, void *);
    175 static int	opb_submatch(device_t, cfdata_t, const int *, void *);
    176 static int	opb_print(void *, const char *);
    177 
    178 CFATTACH_DECL_NEW(opb, sizeof(struct opb_softc),
    179     opb_match, opb_attach, NULL, NULL);
    180 
    181 static struct powerpc_bus_space opb_tag = {
    182 	_BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE,
    183 	0x00000000,
    184 };
    185 static char ex_storage[EXTENT_FIXED_STORAGE_SIZE(8)]
    186     __attribute__((aligned(8)));
    187 static int opb_tag_init_done;
    188 
    189 /*
    190  * Probe for the opb; always succeeds.
    191  */
    192 static int
    193 opb_match(device_t parent, cfdata_t cf, void *aux)
    194 {
    195 	struct opb_attach_args *oaa = aux;
    196 
    197 	/* match only opb devices */
    198 	if (strcmp(oaa->opb_name, cf->cf_name) != 0)
    199 		return 0;
    200 
    201 	return 1;
    202 }
    203 
    204 static int
    205 opb_submatch(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
    206 {
    207 	struct opb_attach_args *oaa = aux;
    208 
    209 	if (cf->cf_loc[OPBCF_ADDR] != OPBCF_ADDR_DEFAULT &&
    210 	    cf->cf_loc[OPBCF_ADDR] != oaa->opb_addr)
    211 		return 0;
    212 
    213 	return config_match(parent, cf, aux);
    214 }
    215 
    216 /*
    217  * Attach the on-chip peripheral bus.
    218  */
    219 static void
    220 opb_attach(device_t parent, device_t self, void *aux)
    221 {
    222 	struct opb_softc *sc = device_private(self);
    223 	struct plb_attach_args *paa = aux;
    224 	struct opb_attach_args oaa;
    225 	int i, pvr;
    226 
    227 	aprint_naive("\n");
    228 	aprint_normal("\n");
    229 	pvr = mfpvr() >> 16;
    230 
    231 	sc->sc_dev = self;
    232 	sc->sc_iot = opb_get_bus_space_tag();
    233 
    234 	for (i = 0; opb_params[i].pvr != 0 && opb_params[i].pvr != pvr; i++)
    235 		;
    236 	if (opb_params[i].pvr == 0)
    237 		panic("opb_get_bus_space_tag: no params for this CPU!");
    238 	opb_get_frequency = opb_params[i].opb_get_frequency;
    239 #ifdef EMAC_ZMII_PHY
    240 	if (opb_params[i].zmii_base != 0)
    241 		bus_space_map(sc->sc_iot, opb_params[i].zmii_base, ZMII0_SIZE,
    242 		    0, &sc->sc_zmiih);
    243 #endif
    244 #ifdef EMAC_RGMII_PHY
    245 	if (opb_params[i].rgmii_base != 0)
    246 		bus_space_map(sc->sc_iot, opb_params[i].rgmii_base, RGMII0_SIZE,
    247 		    0, &sc->sc_rgmiih);
    248 #endif
    249 
    250 	for (i = 0; opb_devs[i].name != NULL; i++) {
    251 		if (opb_devs[i].pvr != pvr)
    252 			continue;
    253 		oaa.opb_name = opb_devs[i].name;
    254 		oaa.opb_addr = opb_devs[i].addr;
    255 		oaa.opb_instance = opb_devs[i].instance;
    256 		oaa.opb_irq = opb_devs[i].irq;
    257 		oaa.opb_bt = sc->sc_iot;
    258 		oaa.opb_dmat = paa->plb_dmat;
    259 		oaa.opb_flags = opb_devs[i].flags;
    260 
    261 		config_found(self, &oaa, opb_print,
    262 		    CFARGS(.submatch = opb_submatch));
    263 	}
    264 }
    265 
    266 static int
    267 opb_print(void *aux, const char *pnp)
    268 {
    269 	struct opb_attach_args *oaa = aux;
    270 
    271 	if (pnp)
    272 		aprint_normal("%s at %s", oaa->opb_name, pnp);
    273 
    274 	if (oaa->opb_addr != OPBCF_ADDR_DEFAULT)
    275 		aprint_normal(" addr 0x%08lx", oaa->opb_addr);
    276 	if (oaa->opb_irq != OPBCF_IRQ_DEFAULT)
    277 		aprint_normal(" irq %d", oaa->opb_irq);
    278 
    279 	return UNCONF;
    280 }
    281 
    282 bus_space_tag_t
    283 opb_get_bus_space_tag(void)
    284 {
    285 	int i, pvr;
    286 
    287 	if (!opb_tag_init_done) {
    288 		pvr = mfpvr() >> 16;
    289 
    290 		for (i = 0; opb_params[i].pvr != 0 && opb_params[i].pvr != pvr;
    291 		    i++)
    292 			;
    293 		if (opb_params[i].pvr == 0)
    294 			panic("opb_get_bus_space_tag: no params for this CPU!");
    295 
    296 		opb_tag.pbs_base = opb_params[i].base;
    297 		opb_tag.pbs_limit = opb_params[i].limit;
    298 
    299 		if (bus_space_init(&opb_tag, "opbtag",
    300 		    ex_storage, sizeof(ex_storage)))
    301 			panic("opb_attach: Failed to initialise opb_tag");
    302 		opb_tag_init_done = 1;
    303 	}
    304 
    305 	return &opb_tag;
    306 }
    307 
    308 static int
    309 opb_get_frequency_405gp(void)
    310 {
    311 	prop_number_t pn;
    312 	uint32_t pllmr;
    313 	unsigned int processor_freq, plb_freq, opb_freq;
    314 
    315 	pn = prop_dictionary_get(board_properties, "processor-frequency");
    316 	KASSERT(pn != NULL);
    317 	processor_freq = (unsigned int) prop_number_integer_value(pn);
    318 	pllmr = mfdcr(DCR_CPC0_PLLMR);
    319 	plb_freq = processor_freq / CPC0_PLLMR_CBDV(pllmr);
    320 	opb_freq = plb_freq / CPC0_PLLMR_OPDV(pllmr);
    321 
    322 	return opb_freq;
    323 }
    324 
    325 static int
    326 opb_get_frequency_405ex(void)
    327 {
    328 	prop_number_t pn;
    329 	unsigned int processor_freq, plb_freq, opb_freq;
    330 
    331 	pn = prop_dictionary_get(board_properties, "processor-frequency");
    332 	KASSERT(pn != NULL);
    333 	processor_freq = (unsigned int) prop_number_integer_value(pn);
    334 	plb_freq = processor_freq / CPR0_PLBDV0(mfcpr(DCR_CPR0_PLBD));
    335 	opb_freq = plb_freq / CPR0_OPBDV0(mfcpr(DCR_CPR0_OPBD));
    336 
    337 	return opb_freq;
    338 }
    339