| /xsrc/external/mit/MesaLib/dist/src/panfrost/bifrost/valhall/ |
| disasm.py | 221 opc = ins.opcode variable 222 OPCODE_BUCKETS[opc] = OPCODE_BUCKETS.get(opc, []) + [ins]
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| ir3_cf.c | 31 if (instr->opc != OPC_MOV) 89 opc_t opc = conv_src->opc; local 92 opc_t new_opc = opc; 97 if (!first && opc != new_opc) 100 opc = new_opc; 102 conv_src->opc = opc; 115 assert(use->opc == OPC_MOV); 132 if (conv->opc != OPC_MOV [all...] |
| ir3_lower_parallelcopy.c | 171 unsigned opc = local 173 struct ir3_instruction *swz = ir3_instr_create(instr->block, opc, 2, 2); 256 unsigned opc = local 258 struct ir3_instruction *mov = ir3_instr_create(instr->block, opc, 1, 1); 526 if (instr->opc == OPC_META_PARALLEL_COPY) { 545 } else if (instr->opc == OPC_META_COLLECT) { 560 } else if (instr->opc == OPC_META_SPLIT) { 574 } else if (instr->opc == OPC_META_PHI) {
|
| disasm-a3xx.c | 149 /* size of largest OPC field of all the instruction categories: */ 155 #define OPC(cat, opc, name) [(opc)] = {#name} 158 OPC(0, OPC_NOP, nop), 159 OPC(0, OPC_B, b), 160 OPC(0, OPC_JUMP, jump), 161 OPC(0, OPC_CALL, call), 162 OPC(0, OPC_RET, ret), 163 OPC(0, OPC_KILL, kill) 502 unsigned opc = (val >> 57) & 0x3; local [all...] |
| ir3_compiler_nir.c | 453 if (alu->src[0].src.is_ssa && is_sat_compatible(src[0]->opc) && 650 if (cond->opc == OPC_ABSNEG_S && cond->flags == 0 && 950 load->opc = OPC_LDL; 980 store->opc = OPC_STL; 1188 emit_sam(struct ir3_context *ctx, opc_t opc, struct tex_src_info info, 1196 sam = ir3_SAM(ctx->block, opc, type, 0b1111, info.flags, info.samp_tex, src0, 1460 assert(instr->opc == OPC_META_INPUT); 2394 opc_t opc = 0; local 2465 opc = OPC_META_TEX_PREFETCH; 2471 opc = has_lod ? OPC_SAML : OPC_SAM [all...] |
| ir3.h | 234 opc_t opc; member in struct:ir3_instruction 653 struct ir3_instruction *ir3_instr_create(struct ir3_block *block, opc_t opc, 763 return (opc_cat(instr->opc) == 0); 769 return instr->opc == OPC_KILL || instr->opc == OPC_DEMOTE; 775 return instr->opc == OPC_NOP; 803 switch (instr->opc) { 849 if (instr->opc != OPC_MOV) 866 return (1 <= opc_cat(instr->opc)) && (opc_cat(instr->opc) <= 3) [all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| r600_isa.c | 561 int opc; local 564 opc = op->opcode[isa->hw_class >> 1]; 565 assert(opc != -1); 567 isa->alu_op3_map[opc] = i + 1; 569 isa->alu_op2_map[opc] = i + 1; 574 int opc = op->opcode[isa->hw_class]; local 575 if ((op->flags & FF_GDS) || ((opc & 0xFF) != opc)) 577 isa->fetch_map[opc] = i + 1; 582 int opc = op->opcode[isa->hw_class] local [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| r600_isa.c | 561 int opc; local 564 opc = op->opcode[isa->hw_class >> 1]; 565 assert(opc != -1); 567 isa->alu_op3_map[opc] = i + 1; 569 isa->alu_op2_map[opc] = i + 1; 574 int opc = op->opcode[isa->hw_class]; local 575 if ((op->flags & FF_GDS) || ((opc & 0xFF) != opc)) 577 isa->fetch_map[opc] = i + 1; 582 int opc = op->opcode[isa->hw_class] local [all...] |
| /xsrc/external/mit/MesaLib/dist/src/freedreno/afuc/ |
| asm.c | 146 afuc_opc opc; local 164 opc = OPC_NOP; 193 opc = tok2alu(ai->tok); 198 opc = OPC_ALU; 215 opc = OPC_MOVI; 224 opc = OPC_MOVI; 230 opc = OPC_ALU; 244 opc = OPC_CWRITE6; 246 opc = OPC_CREAD6; 248 opc = OPC_STORE6 [all...] |
| emu.c | 51 emu_alu(struct emu *emu, afuc_opc opc, uint32_t src1, uint32_t src2) 54 switch (opc) { 103 printf("unhandled alu opc: 0x%02x\n", opc); 126 afuc_opc opc; local 129 afuc_get_opc(instr, &opc, &rep); 131 switch (opc) { 135 uint32_t val = emu_alu(emu, opc, 252 if (opc == OPC_BRNEI) { 255 } else if (opc == OPC_BREQI) 315 afuc_opc opc; local [all...] |
| disasm.c | 102 print_alu_name(afuc_opc opc, uint32_t instr) 104 if (opc == OPC_ADD) { 106 } else if (opc == OPC_ADDHI) { 108 } else if (opc == OPC_SUB) { 110 } else if (opc == OPC_SUBHI) { 112 } else if (opc == OPC_AND) { 114 } else if (opc == OPC_OR) { 116 } else if (opc == OPC_XOR) { 118 } else if (opc == OPC_NOT) { 120 } else if (opc == OPC_SHL) 294 afuc_opc opc; local 420 unsigned opc, p; local 726 afuc_opc opc; local [all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/etnaviv/ |
| etnaviv_disasm.c | 41 uint32_t opc : 6; member in struct:instr 458 #define OPC(opc) [INST_OPCODE_##opc] = {#opc, print_opc_default} 459 #define OPC_MOV(opc) [INST_OPCODE_##opc] = {#opc, print_opc_mov} 460 #define OPC_TEX(opc) [INST_OPCODE_##opc] = {#opc, print_opc_tex 530 const unsigned opc = instr->opc | (instr->opcode_bit6 << 6); local [all...] |
| etnaviv_compiler_tgsi.c | 1084 uint8_t opc; member in struct:instr_translater 1099 instr.opcode = t->opc; 1289 .opcode = t->opc, 1791 INSTR(MOV, trans_instr, .opc = INST_OPCODE_MOV, .src = {2, -1, -1}), 1792 INSTR(RCP, trans_instr, .opc = INST_OPCODE_RCP, .src = {2, -1, -1}), 1793 INSTR(RSQ, trans_instr, .opc = INST_OPCODE_RSQ, .src = {2, -1, -1}), 1794 INSTR(MUL, trans_instr, .opc = INST_OPCODE_MUL, .src = {0, 1, -1}), 1795 INSTR(ADD, trans_instr, .opc = INST_OPCODE_ADD, .src = {0, 2, -1}), 1796 INSTR(DP2, trans_instr, .opc = INST_OPCODE_DP2, .src = {0, 1, -1}), 1797 INSTR(DP3, trans_instr, .opc = INST_OPCODE_DP3, .src = {0, 1, -1}) 1908 const unsigned opc = inst->Instruction.Opcode; local [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/freedreno/ir3/ |
| disasm-a3xx.c | 167 switch (cat0->opc) { 258 switch (_OPC(2, cat2->opc)) { 291 switch (_OPC(2, cat2->opc)) { 442 switch (_OPC(5, cat5->opc)) { 459 if (info[cat5->opc].src1) { 466 if (cat5->is_o || info[cat5->opc].src2) { 475 if (cat5->is_o || info[cat5->opc].src2) { 480 if (info[cat5->opc].samp) 482 if (info[cat5->opc].tex) 509 switch (_OPC(6, cat6->opc)) { 864 uint16_t opc; member in struct:opc_info 1043 uint32_t opc = instr_opc(instr, ctx->gpu_id); local [all...] |
| ir3.h | 161 opc_t opc; member in struct:ir3_instruction 535 struct ir3_instruction * ir3_instr_create(struct ir3_block *block, opc_t opc); 537 opc_t opc, int nreg); 599 return (opc_cat(instr->opc) == 0); 604 return instr->opc == OPC_KILL; 609 return instr->opc == OPC_NOP; 620 switch (instr->opc) { 650 return (1 <= opc_cat(instr->opc)) && (opc_cat(instr->opc) <= 3); 655 return (opc_cat(instr->opc) == 4) [all...] |
| ir3_compiler_nir.c | 430 ((opc_cat(src[0]->opc) == 2) || (opc_cat(src[0]->opc) == 3))) { 1689 opc_t opc = 0; local 1743 case nir_texop_tex: opc = has_lod ? OPC_SAML : OPC_SAM; break; 1744 case nir_texop_txb: opc = OPC_SAMB; break; 1745 case nir_texop_txl: opc = OPC_SAML; break; 1746 case nir_texop_txd: opc = OPC_SAMGQ; break; 1747 case nir_texop_txf: opc = OPC_ISAML; break; 1748 case nir_texop_lod: opc = OPC_GETLOD; break; 1755 case 0: opc = OPC_GATHER4R; break [all...] |
| instr-a3xx.h | 34 /* size of largest OPC field of all the instruction categories: */ 37 #define _OPC(cat, opc) (((cat) << NOPC_BITS) | opc) 217 #define opc_cat(opc) ((int)((opc) >> NOPC_BITS)) 218 #define opc_op(opc) ((unsigned)((opc) & ((1 << NOPC_BITS) - 1))) 317 uint32_t opc : 4; member in struct:PACKED 424 uint32_t opc : 6; member in struct:PACKED 485 uint32_t opc : 4 member in struct:PACKED 543 uint32_t opc : 6; member in struct:PACKED 592 uint32_t opc : 5; member in struct:PACKED 723 uint32_t opc : 5; member in struct:PACKED::PACKED 757 uint32_t opc : 5; member in struct:PACKED 784 uint32_t opc : 4; \/* presumed, but only a couple known OPCs *\/ member in struct:PACKED [all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a2xx/ |
| ir2_private.h | 108 instr_fetch_opc_t opc : 5; member in struct:ir2_instr::__anon1184::__anon1185 381 switch (instr->fetch.opc) {
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/etnaviv/ |
| etnaviv_disasm.c | 38 uint32_t opc : 6; member in struct:instr 459 #define OPC(opc) [INST_OPCODE_##opc] = {#opc, print_opc_default} 460 #define OPC_MOV(opc) [INST_OPCODE_##opc] = {#opc, print_opc_mov} 461 #define OPC_TEX(opc) [INST_OPCODE_##opc] = {#opc, print_opc_tex 523 const unsigned opc = instr->opc | (instr->opcode_bit6 << 6); local [all...] |
| etnaviv_compiler.c | 1040 uint8_t opc; member in struct:instr_translater 1055 instr.opcode = t->opc; 1245 .opcode = t->opc, 1747 INSTR(MOV, trans_instr, .opc = INST_OPCODE_MOV, .src = {2, -1, -1}), 1748 INSTR(RCP, trans_instr, .opc = INST_OPCODE_RCP, .src = {2, -1, -1}), 1749 INSTR(RSQ, trans_instr, .opc = INST_OPCODE_RSQ, .src = {2, -1, -1}), 1750 INSTR(MUL, trans_instr, .opc = INST_OPCODE_MUL, .src = {0, 1, -1}), 1751 INSTR(ADD, trans_instr, .opc = INST_OPCODE_ADD, .src = {0, 2, -1}), 1752 INSTR(DP2, trans_instr, .opc = INST_OPCODE_DP2, .src = {0, 1, -1}), 1753 INSTR(DP3, trans_instr, .opc = INST_OPCODE_DP3, .src = {0, 1, -1}) 1849 const unsigned opc = inst->Instruction.Opcode; local [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a2xx/ |
| ir2_private.h | 108 instr_fetch_opc_t opc : 5; member in struct:ir2_instr::__anon3665::__anon3666 365 switch (instr->fetch.opc) {
|
| instr-a2xx.h | 224 instr_cf_opc_t opc : 4; member in struct:PACKED 233 instr_cf_opc_t opc : 4; member in struct:PACKED 246 instr_cf_opc_t opc : 4; member in struct:PACKED 255 instr_cf_opc_t opc : 4; member in struct:PACKED 265 instr_cf_opc_t opc : 4; member in struct:PACKED::PACKED 324 instr_fetch_opc_t opc : 5; member in struct:PACKED 358 instr_fetch_opc_t opc : 5; member in struct:PACKED 391 instr_fetch_opc_t opc : 5; member in struct:PACKED::PACKED
|
| /xsrc/external/mit/freetype/dist/src/truetype/ |
| ttobjs.h | 163 FT_UInt opc; /* function #, or instruction code */ member in struct:TT_DefRecord_
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/decode/ |
| crashdec.c | 291 /* TODO maybe we can check validish looking pkt3 opc or pkt0 491 unsigned opc = cp_type7_opcode(stat[0]); local 492 const char *name = pktname(opc);
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir2/ |
| instr-a2xx.h | 221 instr_cf_opc_t opc : 4; member in struct:PACKED 230 instr_cf_opc_t opc : 4; member in struct:PACKED 243 instr_cf_opc_t opc : 4; member in struct:PACKED 252 instr_cf_opc_t opc : 4; member in struct:PACKED 262 instr_cf_opc_t opc : 4; member in struct:PACKED::PACKED 319 instr_fetch_opc_t opc : 5; member in struct:PACKED 353 instr_fetch_opc_t opc : 5; member in struct:PACKED 386 instr_fetch_opc_t opc : 5; member in struct:PACKED::PACKED
|