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    Searched defs:reg_val (Results 1 - 25 of 42) sorted by relevancy

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  /src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/src/
amdgpu_dmub_reg.c 81 uint32_t reg_val; local
89 reg_val = srv->funcs.reg_read(srv->user_ctx, addr);
90 reg_val = (reg_val & ~field_value_mask.mask) | field_value_mask.value;
91 srv->funcs.reg_write(srv->user_ctx, addr, reg_val);
94 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n,
105 reg_val = (reg_val & ~field_value_mask.mask) | field_value_mask.value;
106 srv->funcs.reg_write(srv->user_ctx, addr, reg_val);
112 uint32_t reg_val = srv->funcs.reg_read(srv->user_ctx, addr) local
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dsb.c 205 u32 reg_val; local
233 reg_val = buf[dsb->ins_start_offset + 1] & DSB_REG_VALUE_MASK;
234 if (reg_val != i915_mmio_reg_offset(reg)) {
intel_dp_aux_backlight.c 35 u8 reg_val = 0; local
42 &reg_val) < 0) {
48 reg_val |= DP_EDP_BACKLIGHT_ENABLE;
50 reg_val &= ~(DP_EDP_BACKLIGHT_ENABLE);
53 reg_val) != 1) {
  /src/external/gpl3/gdb.old/dist/gdb/
rs6000-lynx178-tdep.c 109 gdb_byte reg_val[PPC_MAX_REGISTER_SIZE]; local
114 target_float_convert (arg->contents ().data (), type, reg_val,
116 regcache->cooked_write (fp_regnum, reg_val);
dummy-frame.c 343 struct value *reg_val; local
350 reg_val = value::zero (register_type (gdbarch, regnum), not_lval);
356 (regnum, reg_val->contents_writeable ().data ());
357 return reg_val;
frame-unwind.c 307 struct value *reg_val; local
309 reg_val = value::zero (register_type (gdbarch, regnum), not_lval);
310 store_unsigned_integer (reg_val->contents_writeable ().data (),
312 return reg_val;
319 struct value *reg_val; local
321 reg_val = value::zero (register_type (gdbarch, regnum), not_lval);
322 memcpy (reg_val->contents_raw ().data (), buf,
324 return reg_val;
336 struct value *reg_val; local
338 reg_val = value::zero (register_type (gdbarch, regnum), not_lval)
    [all...]
rs6000-aix-tdep.c 576 gdb_byte reg_val[PPC_MAX_REGISTER_SIZE]; local
581 target_float_convert (arg->contents ().data (), type, reg_val,
583 regcache->cooked_write (fp_regnum, reg_val);
  /src/external/gpl3/gdb/dist/gdb/
rs6000-lynx178-tdep.c 109 gdb_byte reg_val[PPC_MAX_REGISTER_SIZE]; local
114 target_float_convert (arg->contents ().data (), type, reg_val,
116 regcache->cooked_write (fp_regnum, reg_val);
dummy-frame.c 343 struct value *reg_val; local
350 reg_val = value::zero (register_type (gdbarch, regnum), not_lval);
356 (regnum, reg_val->contents_writeable ().data ());
357 return reg_val;
frame-unwind.c 326 struct value *reg_val; local
328 reg_val = value::zero (register_type (gdbarch, regnum), not_lval);
329 store_unsigned_integer (reg_val->contents_writeable ().data (),
331 return reg_val;
339 struct value *reg_val; local
341 reg_val = value::zero (register_type (gdbarch, regnum), not_lval);
342 gdb::array_view<gdb_byte> val_contents = reg_val->contents_raw ();
355 return reg_val;
367 struct value *reg_val; local
369 reg_val = value::zero (register_type (gdbarch, regnum), not_lval)
    [all...]
rs6000-aix-tdep.c 577 gdb_byte reg_val[PPC_MAX_REGISTER_SIZE]; local
582 target_float_convert (arg->contents ().data (), type, reg_val,
584 regcache->cooked_write (fp_regnum, reg_val);
  /src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.base/
jit-reader.c 98 struct gdb_reg_value *reg_val = local
100 reg_val->defined = 1;
101 reg_val->free = free_reg_value;
103 memcpy (reg_val->value, &value, size);
104 callbacks->reg_set (callbacks, dw_reg, reg_val);
112 struct gdb_reg_value *reg_val = callbacks->reg_get (callbacks, dw_reg); local
113 if (reg_val->size != size || !reg_val->defined)
115 reg_val->free (reg_val);
    [all...]
  /src/external/gpl3/gdb/dist/gdb/testsuite/gdb.base/
jit-reader.c 98 struct gdb_reg_value *reg_val = local
100 reg_val->defined = 1;
101 reg_val->free = free_reg_value;
103 memcpy (reg_val->value, &value, size);
104 callbacks->reg_set (callbacks, dw_reg, reg_val);
112 struct gdb_reg_value *reg_val = callbacks->reg_get (callbacks, dw_reg); local
113 if (reg_val->size != size || !reg_val->defined)
115 reg_val->free (reg_val);
    [all...]
  /src/sys/dev/i2c/
axp809.c 206 u_int vol, reg_val; local
216 reg_val = 0;
221 ++reg_val;
225 ++reg_val;
236 val |= __SHIFTIN(reg_val, c->c_voltage_mask);
252 int reg_val, error; local
264 reg_val = __SHIFTOUT(val, c->c_voltage_mask);
265 if (reg_val < c->c_step1cnt) {
266 *pvol = c->c_min + reg_val * c->c_step1;
269 ((reg_val - c->c_step1cnt) * c->c_step2)
    [all...]
axppmic.c 596 u_int vol, reg_val; local
606 reg_val = 0;
611 ++reg_val;
619 ++reg_val;
629 val |= __SHIFTIN(reg_val, c->c_voltage_mask);
640 int reg_val, error; local
652 reg_val = __SHIFTOUT(val, c->c_voltage_mask);
653 if (reg_val < c->c_step1cnt) {
654 *pvol = c->c_min + reg_val * c->c_step1;
657 ((reg_val - c->c_step1cnt) * c->c_step2)
    [all...]
  /src/sys/dev/pci/ixgbe/
ixgbe_vf.c 265 u32 reg_val; local
286 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
287 reg_val &= ~IXGBE_RXDCTL_ENABLE;
288 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
ixgbe_x550.c 2325 u32 reg_val; local
2329 IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);
2333 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;
2334 reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR |
2339 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR;
2343 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX;
2347 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);
2353 IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);
2358 reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK;
2359 reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN
2810 u16 reg_slice, reg_val; local
2854 u32 reg_val; local
3009 u32 reg_val; local
3080 u32 reg_val; local
3238 u32 reg_val; local
4103 u32 pause, asm_dir, reg_val; local
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
amdgpu_dc_helper.c 171 uint32_t reg_val)
189 cmd_buf->write_values[offload->reg_seq_count] = reg_val;
254 uint32_t reg_val; local
270 reg_val = dm_read_reg(ctx, addr);
271 reg_val = (reg_val & ~field_value_mask.mask) | field_value_mask.value;
272 dm_write_reg(ctx, addr, reg_val);
273 return reg_val;
277 uint32_t addr, uint32_t reg_val, int n,
293 reg_val = (reg_val & ~field_value_mask.mask) | field_value_mask.value
334 uint32_t reg_val = dm_read_reg(ctx, addr); local
343 uint32_t reg_val = dm_read_reg(ctx, addr); local
354 uint32_t reg_val = dm_read_reg(ctx, addr); local
367 uint32_t reg_val = dm_read_reg(ctx, addr); local
382 uint32_t reg_val = dm_read_reg(ctx, addr); local
399 uint32_t reg_val = dm_read_reg(ctx, addr); local
418 uint32_t reg_val = dm_read_reg(ctx, addr); local
439 uint32_t reg_val = dm_read_reg(ctx, addr); local
487 uint32_t reg_val; local
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/gem/
i915_gem_stolen.c 180 u32 reg_val = intel_uncore_read(uncore, local
187 IS_GM45(i915) ? "CTG" : "ELK", reg_val);
189 if ((reg_val & G4X_STOLEN_RESERVED_ENABLE) == 0)
197 reg_val);
199 if (!(reg_val & G4X_STOLEN_RESERVED_ADDR2_MASK))
202 if (!(reg_val & G4X_STOLEN_RESERVED_ADDR2_MASK))
205 *base = (reg_val & G4X_STOLEN_RESERVED_ADDR2_MASK) << 16;
206 WARN_ON((reg_val & G4X_STOLEN_RESERVED_ADDR1_MASK) < *base);
216 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); local
218 DRM_DEBUG_DRIVER("GEN6_STOLEN_RESERVED = %08x\n", reg_val);
249 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); local
278 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); local
305 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); local
338 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); local
358 u64 reg_val = intel_uncore_read64(uncore, GEN6_STOLEN_RESERVED); local
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hubp.c 56 uint32_t reg_val = REG_READ(DCHUBP_CNTL); local
58 if (reg_val) {
62 * we just wrote reg_val to non-0, if it stay 0
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_hubp.c 924 uint32_t reg_val = REG_READ(DCHUBP_CNTL); local
926 if (reg_val) {
930 * we just wrote reg_val to non-0, if it stay 0
  /src/sys/dev/usb/
if_smsc.c 586 uint32_t reg_val; local
623 if ((err = smsc_readreg(un, SMSC_HW_CFG, &reg_val)) != 0) {
627 reg_val |= SMSC_HW_CFG_BIR;
628 smsc_writereg(un, SMSC_HW_CFG, reg_val);
658 if ((err = smsc_readreg(un, SMSC_HW_CFG, &reg_val)) < 0) {
668 reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE);
674 reg_val |= ETHER_ALIGN << SMSC_HW_CFG_RXDOFF_SHIFT;
676 smsc_writereg(un, SMSC_HW_CFG, reg_val);
688 reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED |
690 smsc_writereg(un, SMSC_LED_GPIO_CFG, reg_val);
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/
amdgpu_dce120_resource.c 667 uint32_t reg_val = dm_read_reg_soc15(ctx, mmCC_DC_MISC_STRAPS, 0); local
669 straps->audio_stream_number = get_reg_field_value(reg_val,
672 straps->hdmi_disable = get_reg_field_value(reg_val,
676 reg_val = dm_read_reg_soc15(ctx, mmDC_PINSTRAPS, 0);
677 straps->dc_pinstraps_audio = get_reg_field_value(reg_val,
  /src/sys/external/bsd/drm2/dist/drm/i915/
intel_uncore.h 482 u32 reg_val; local
485 reg_val = intel_uncore_read(uncore, reg);
487 return (reg_val & mask) != expected_val ? -EINVAL : 0;
  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
handlers.c 718 u32 reg_val; local
721 reg_val = *((u32 *)p_data);
724 vgpu_vreg(vgpu, offset) = (reg_val & ~sticky_mask) |
726 vgpu_vreg(vgpu, offset) &= ~(reg_val & sticky_mask);

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