1 /* $NetBSD: octeon_gmxvar.h,v 1.7 2020/06/23 05:17:13 simonb Exp $ */ 2 3 /* 4 * Copyright (c) 2007 Internet Initiative Japan, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _OCTEON_GMXVAR_H_ 30 #define _OCTEON_GMXVAR_H_ 31 32 #include <net/if.h> 33 #include <net/if_media.h> 34 #include <net/if_ether.h> 35 #include <dev/mii/mii.h> 36 #include <dev/mii/miivar.h> 37 38 #define GMX_MII_PORT 1 39 #define GMX_GMII_PORT 2 40 #define GMX_RGMII_PORT 3 41 #define GMX_SGMII_PORT 4 42 #define GMX_SPI42_PORT 5 43 44 #define GMX_FRM_MAX_SIZ 0x600 45 46 enum CNMAC_QUIRKS { 47 CNMAC_QUIRKS_NO_RX_INBND = 1 << 0, 48 CNMAC_QUIRKS_NO_PRE_ALIGN = 1 << 1, 49 }; 50 51 #if 1 52 struct octgmx_softc; 53 struct octgmx_port_softc; 54 55 struct octgmx_port_softc { 56 struct octgmx_softc *sc_port_gmx; 57 bus_space_handle_t sc_port_regh; 58 int sc_port_no; /* GMX0:0, GMX0:1, ... */ 59 int sc_port_type; 60 uint64_t sc_mac; 61 int sc_quirks; 62 uint64_t sc_link; 63 struct mii_data *sc_port_mii; 64 struct ethercom *sc_port_ec; 65 struct octgmx_port_ops 66 *sc_port_ops; 67 struct octasx_softc *sc_port_asx; 68 bus_space_handle_t sc_port_pcs_regh; 69 struct octipd_softc *sc_ipd; 70 int sc_port_flowflags; 71 72 int sc_clk_tx_setting; 73 int sc_clk_rx_setting; 74 }; 75 76 struct octgmx_softc { 77 device_t sc_dev; 78 79 bus_space_tag_t sc_regt; 80 bus_space_handle_t sc_regh; 81 int sc_unitno; /* GMX0, GMX1, ... */ 82 int sc_nports; 83 int sc_port_types[4/* XXX */]; 84 85 struct octgmx_port_softc 86 *sc_ports; 87 }; 88 #endif 89 90 struct octgmx_attach_args { 91 bus_space_tag_t ga_regt; 92 bus_addr_t ga_addr; 93 const char *ga_name; 94 int ga_portno; 95 int ga_port_type; 96 struct octsmi_softc *ga_smi; 97 98 struct octgmx_softc *ga_gmx; 99 struct octgmx_port_softc 100 *ga_gmx_port; 101 }; 102 103 int octgmx_port_enable(struct octgmx_port_softc *, int); 104 int octgmx_stats_init(struct octgmx_port_softc *); 105 void octgmx_stats(struct octgmx_port_softc *); 106 int octgmx_set_mac_addr(struct octgmx_port_softc *, const uint8_t *); 107 int octgmx_set_filter(struct octgmx_port_softc *); 108 int octgmx_tx_stats_rd_clr(struct octgmx_port_softc *, int); 109 int octgmx_rx_stats_rd_clr(struct octgmx_port_softc *, int); 110 int octgmx_reset_speed(struct octgmx_port_softc *); 111 int octgmx_reset_flowctl(struct octgmx_port_softc *); 112 int octgmx_reset_timing(struct octgmx_port_softc *); 113 static __inline int octgmx_link_status(struct octgmx_port_softc *); 114 115 static __inline int 116 octgmx_link_status(struct octgmx_port_softc *sc) 117 { 118 119 return ((sc->sc_port_mii->mii_media_status & (IFM_AVALID | IFM_ACTIVE)) 120 == (IFM_AVALID | IFM_ACTIVE)); 121 } 122 123 #endif /* _OCTEON_GMXVAR_H_ */ 124