1 /* $NetBSD: pic_distopenpic.c,v 1.14 2022/02/23 21:54:40 andvar Exp $ */ 2 3 /*- 4 * Copyright (c) 2008 Tim Rightnour 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of The NetBSD Foundation nor the names of its 16 * contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: pic_distopenpic.c,v 1.14 2022/02/23 21:54:40 andvar Exp $"); 34 35 #ifdef _KERNEL_OPT 36 #include "opt_openpic.h" 37 #endif 38 39 #include <sys/param.h> 40 #include <sys/kernel.h> 41 #include <sys/kmem.h> 42 43 #include <uvm/uvm_extern.h> 44 45 #include <machine/pio.h> 46 #include <powerpc/openpic.h> 47 48 #include <powerpc/pic/picvar.h> 49 50 /* distributed stuff */ 51 static int opic_isu_from_irq(struct openpic_ops *, int, int *); 52 static u_int distopic_read(struct openpic_ops *, int, int); 53 static void distopic_write(struct openpic_ops *, int, int, u_int); 54 static void distopic_establish_irq(struct pic_ops *, int, int, int); 55 static void distopic_enable_irq(struct pic_ops *, int, int); 56 static void distopic_disable_irq(struct pic_ops *, int); 57 static void distopic_finish_setup(struct pic_ops *); 58 59 struct pic_ops * 60 setup_distributed_openpic(void *addr, int nrofisus, void **isu, int *maps) 61 { 62 struct openpic_ops *opicops; 63 struct pic_ops *pic; 64 int irq, i; 65 u_int x; 66 67 openpic_base = (void *)addr; 68 opicops = kmem_alloc(sizeof(*opicops), KM_SLEEP); 69 pic = &opicops->pic; 70 71 x = openpic_read(OPENPIC_FEATURE); 72 if (((x & 0x07ff0000) >> 16) != 0) 73 panic("Can't handle a distributed openpic with internal ISU"); 74 75 opicops->nrofisus = nrofisus; 76 opicops->isu = kmem_alloc(sizeof(volatile u_char *) * nrofisus, 77 KM_SLEEP); 78 opicops->irq_per = kmem_alloc(sizeof(uint8_t) * nrofisus, KM_SLEEP); 79 80 for (irq=0, i=0; i < nrofisus ; i++) { 81 opicops->isu[i] = (void *)isu[i]; 82 opicops->irq_per[i] = maps[i]/0x20; 83 irq += maps[i]/0x20; 84 aprint_debug("%d: irqtotal=%d, added %d\n", i, irq, 85 maps[i]/0x20); 86 } 87 aprint_normal("OpenPIC Version 1.%d: " 88 "Supports %d CPUs and %d interrupt sources.\n", 89 x & 0xff, ((x & 0x1f00) >> 8) + 1, irq); 90 pic->pic_numintrs = irq; 91 pic->pic_cookie = addr; 92 pic->pic_enable_irq = distopic_enable_irq; 93 pic->pic_reenable_irq = distopic_enable_irq; 94 pic->pic_disable_irq = distopic_disable_irq; 95 pic->pic_get_irq = opic_get_irq; 96 pic->pic_ack_irq = opic_ack_irq; 97 pic->pic_establish_irq = distopic_establish_irq; 98 pic->pic_finish_setup = distopic_finish_setup; 99 opicops->flags = OPENPIC_FLAG_DIST; 100 strcpy(pic->pic_name, "openpic"); 101 pic_add(pic); 102 103 openpic_set_priority(0, 15); 104 105 for (i=0; i < nrofisus; i++) { 106 for (irq = 0; irq < opicops->irq_per[i]; irq++) { 107 /* make sure to keep disabled */ 108 distopic_write(opicops, i, 109 OPENPIC_DSRC_VECTOR_OFFSET(irq), OPENPIC_IMASK); 110 /* send all interrupts to CPU 0 */ 111 distopic_write(opicops, i, 112 OPENPIC_DSRC_IDEST_OFFSET(irq), 1 << 0); 113 } 114 } 115 116 x = openpic_read(OPENPIC_CONFIG); 117 x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE; 118 openpic_write(OPENPIC_CONFIG, x); 119 120 openpic_write(OPENPIC_SPURIOUS_VECTOR, 0xff); 121 122 openpic_set_priority(0, 0); 123 124 /* clear all pending interrupts */ 125 for (irq = 0; irq < pic->pic_numintrs; irq++) { 126 openpic_read_irq(0); 127 openpic_eoi(0); 128 } 129 130 #if 0 131 printf("timebase freq=%d\n", openpic_read(0x10f0)); 132 #endif 133 return pic; 134 135 } 136 137 /* Begin distributed openpic code */ 138 139 static int 140 opic_isu_from_irq(struct openpic_ops *opic, int irq, int *realirq) 141 { 142 int i; 143 144 for (i=0; i < opic->nrofisus; i++) { 145 if (irq < opic->irq_per[i]) { 146 *realirq = irq; 147 return i; 148 } else 149 irq -= opic->irq_per[i]; 150 } 151 return -1; 152 } 153 154 static u_int 155 distopic_read(struct openpic_ops *opic, int isu, int offset) 156 { 157 volatile unsigned char *addr = opic->isu[isu] + offset; 158 159 return in32rb(addr); 160 } 161 162 static void 163 distopic_write(struct openpic_ops *opic, int isu, int offset, u_int val) 164 { 165 volatile unsigned char *addr = opic->isu[isu] + offset; 166 167 out32rb(addr, val); 168 } 169 170 static void 171 distopic_establish_irq(struct pic_ops *pic, int irq, int type, int pri) 172 { 173 struct openpic_ops *opic = (struct openpic_ops *)pic; 174 int isu, realirq = -1, realpri = uimax(1, uimin(15, pri)); 175 uint32_t x; 176 177 isu = opic_isu_from_irq(opic, irq, &realirq); 178 KASSERT(isu != -1); 179 180 x = irq; 181 x |= OPENPIC_IMASK; 182 183 if ((realirq == 0 && isu == 0) || 184 type == IST_EDGE_RISING || type == IST_LEVEL_HIGH) 185 x |= OPENPIC_POLARITY_POSITIVE; 186 else 187 x |= OPENPIC_POLARITY_NEGATIVE; 188 189 if (type == IST_EDGE_FALLING || type == IST_EDGE_RISING) 190 x |= OPENPIC_SENSE_EDGE; 191 else 192 x |= OPENPIC_SENSE_LEVEL; 193 194 x |= realpri << OPENPIC_PRIORITY_SHIFT; 195 distopic_write(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq), x); 196 197 aprint_debug("%s: setting IRQ %d to priority %d 0x%x\n", __func__, 198 irq, realpri, x); 199 } 200 201 static void 202 distopic_enable_irq(struct pic_ops *pic, int irq, int type) 203 { 204 struct openpic_ops *opic = (struct openpic_ops *)pic; 205 int isu, realirq = -1; 206 u_int x; 207 208 isu = opic_isu_from_irq(opic, irq, &realirq); 209 KASSERT(isu != -1); 210 x = distopic_read(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq)); 211 x &= ~OPENPIC_IMASK; 212 distopic_write(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq), x); 213 } 214 215 static void 216 distopic_disable_irq(struct pic_ops *pic, int irq) 217 { 218 struct openpic_ops *opic = (struct openpic_ops *)pic; 219 int isu, realirq = -1; 220 u_int x; 221 222 isu = opic_isu_from_irq(opic, irq, &realirq); 223 KASSERT(isu != -1); 224 x = distopic_read(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq)); 225 x |= OPENPIC_IMASK; 226 distopic_write(opic, isu, OPENPIC_DSRC_VECTOR_OFFSET(realirq), x); 227 } 228 229 static void 230 distopic_finish_setup(struct pic_ops *pic) 231 { 232 struct openpic_ops *opic = (struct openpic_ops *)pic; 233 uint32_t cpumask = 0; 234 int i, irq; 235 236 #ifdef OPENPIC_DISTRIBUTE 237 for (i = 0; i < ncpu; i++) 238 cpumask |= (1 << cpu_info[i].ci_index); 239 #else 240 cpumask = 1; 241 #endif 242 for (i=0; i < opic->nrofisus; i++) { 243 for (irq = 0; irq < opic->irq_per[i]; irq++) { 244 distopic_write(opic, i, OPENPIC_DSRC_IDEST_OFFSET(irq), 245 cpumask); 246 } 247 } 248 } 249