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      1 /* $NetBSD: s3c24x0_spi.h,v 1.3 2012/01/30 03:28:33 nisimura Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2004  Genetec corporation.  All rights reserved.
      5  * Written by Hiroyuki Bessho for Genetec corporation.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. The name of Genetec corporation may not be used to endorse
     16  *    or promote products derived from this software without specific prior
     17  *    written permission.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND
     20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORP.
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _S3C2410_SPI_H_
     33 #define _S3C2410_SPI_H_
     34 
     35 #include <arm/s3c2xx0/s3c24x0var.h>
     36 
     37 struct ssspi_softc;
     38 
     39 /*
     40  * attach arguments for sub-devices hooked to SPI ports.
     41  */
     42 struct ssspi_attach_args {
     43 	s3c2xx0_chipset_tag_t	spia_sc;
     44 	bus_space_tag_t  	spia_iot;
     45 	bus_space_handle_t	spia_ioh;   /* SPI controller registers */
     46 	bus_space_handle_t	spia_gpioh; /* GPIO registers. SPI devices often
     47 					       needs additional pins */
     48 	bus_dma_tag_t    	spia_dmat;
     49 	short			spia_intr;  /* interrupt from SPI */
     50 	short			spia_index; /* index number of SPI unit (0|1) */
     51 	short			spia_aux_intr; /* additional interrupt */
     52 };
     53 
     54 
     55 int s3c24x0_spi_setup(struct ssspi_softc *, uint32_t, int, int);
     56 int s3c24x0_spi_master_send(struct ssspi_softc *, uint8_t);
     57 int s3c24x0_spi_wait(struct ssspi_softc *, uint8_t*);
     58 void s3c24x0_spi_spin_wait(struct ssspi_softc *sc);
     59 int s3c24x0_spi_bps(struct ssspi_softc *sc, int bps);
     60 
     61 
     62 #endif /* _S3C2410_SPI_H_ */
     63