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    Searched defs:train_set (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_atombios_dp.c 213 u8 train_set[4])
245 train_set[lane] = v | p;
488 u8 train_set[4]; member in struct:amdgpu_atombios_dp_link_train_info
500 0, dp_info->train_set[0]); /* sets all lanes at once */
504 dp_info->train_set, dp_info->dp_lane_count);
598 memset(dp_info->train_set, 0, 4);
622 if ((dp_info->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0)
630 if ((dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {
639 voltage = dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
641 /* Compute new train_set as requested by sink *
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_atombios_dp.c 271 u8 train_set[4])
303 train_set[lane] = v | p;
558 u8 train_set[4]; member in struct:radeon_dp_link_train_info
570 0, dp_info->train_set[0]); /* sets all lanes at once */
574 dp_info->train_set, dp_info->dp_lane_count);
685 memset(dp_info->train_set, 0, 4);
709 if ((dp_info->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0)
717 if ((dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {
726 voltage = dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
728 /* Compute new train_set as requested by sink *
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_ddi.c 2906 u8 train_set = intel_dp->train_set[0]; local in function:intel_ddi_dp_level
2907 int signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |
intel_display_types.h 1258 u8 train_set[4]; member in struct:intel_dp
intel_dp.c 3879 u8 train_set = intel_dp->train_set[0]; local in function:vlv_signal_levels
3881 switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {
3884 switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {
3907 switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {
3926 switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {
3941 switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {
3965 u8 train_set = intel_dp->train_set[0]; local in function:chv_signal_levels
3967 switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK)
4147 u8 train_set = intel_dp->train_set[0]; local in function:intel_dp_set_signal_levels
    [all...]

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