/src/sys/external/bsd/drm2/dist/drm/radeon/ |
radeon_rv730_dpm.c | 97 u32 vco_freq = engine_clock * post_divider; local in function:rv730_populate_sclk_value 100 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { 172 u32 vco_freq = memory_clock * post_divider; local in function:rv730_populate_mclk_value 175 ASIC_INTERNAL_MEMORY_SS, vco_freq)) {
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radeon_rv740_dpm.c | 165 u32 vco_freq = engine_clock * dividers.post_div; local in function:rv740_populate_sclk_value 168 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { 252 u32 vco_freq = memory_clock * dividers.post_div; local in function:rv740_populate_mclk_value 255 ASIC_INTERNAL_MEMORY_SS, vco_freq)) {
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radeon_uvd.c | 924 static unsigned radeon_uvd_calc_upll_post_div(unsigned vco_freq, 929 unsigned post_div = vco_freq / target_freq; 936 if ((vco_freq / post_div) > target_freq) 976 unsigned vco_freq, ref_freq = rdev->clock.spll.reference_freq; local in function:radeon_uvd_calc_upll_dividers 983 for (vco_freq = vco_min; vco_freq <= vco_max; vco_freq += 100) { 985 uint64_t fb_div = (uint64_t)vco_freq * fb_factor; 997 vclk_div = radeon_uvd_calc_upll_post_div(vco_freq, vclk, 1003 dclk_div = radeon_uvd_calc_upll_post_div(vco_freq, dclk [all...] |
radeon_cypress_dpm.c | 561 u32 vco_freq = memory_clock * dividers.post_div; local in function:cypress_populate_mclk_value 564 ASIC_INTERNAL_MEMORY_SS, vco_freq)) {
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radeon_rv6xx_dpm.c | 538 static inline u32 rv6xx_calculate_spread_spectrum_clk_v(u32 vco_freq, u32 ref_freq, 542 u32 fb_divider = vco_freq / ref_freq; 545 (5375 * ((vco_freq * 10) / (4096 >> fb_divider_scale)))); 560 u32 vco_freq, clk_v, clk_s; local in function:rv6xx_program_engine_spread_spectrum 566 vco_freq = rv6xx_calculate_vco_frequency(ref_clk, ÷rs, 570 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { 571 clk_v = rv6xx_calculate_spread_spectrum_clk_v(vco_freq, 639 u32 *vco_freq) 650 if (vco_freq_temp > *vco_freq) { 652 *vco_freq = vco_freq_temp 663 u32 vco_freq = 0, clk_v, clk_s; local in function:rv6xx_program_mclk_spread_spectrum_parameters [all...] |
radeon_rv770_dpm.c | 544 u32 vco_freq = engine_clock * post_divider; local in function:rv770_populate_sclk_value 547 ASIC_INTERNAL_ENGINE_SS, vco_freq)) {
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radeon_ni_dpm.c | 2046 u32 vco_freq = engine_clock * dividers.post_div; local in function:ni_calculate_sclk_params 2049 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { 2242 u32 vco_freq = memory_clock * dividers.post_div; local in function:ni_populate_mclk_value 2245 ASIC_INTERNAL_MEMORY_SS, vco_freq)) {
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radeon_ci_dpm.c | 3195 u32 vco_freq = engine_clock * dividers.post_div; local in function:ci_calculate_sclk_params 3198 ASIC_INTERNAL_ENGINE_SS, vco_freq)) {
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radeon_si_dpm.c | 4828 u32 vco_freq = engine_clock * dividers.post_div; local in function:si_calculate_sclk_params 4831 ASIC_INTERNAL_ENGINE_SS, vco_freq)) {
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radeon.h | 292 uint32_t vco_freq; member in struct:radeon_clock
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
clock_source.h | 112 uint32_t vco_freq; member in struct:pll_settings
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/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
amdgpu_ci_smumgr.c | 346 uint32_t vco_freq = clock * dividers.uc_pll_post_div; local in function:ci_calculate_sclk_params 349 vco_freq, &ss_info)) {
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amdgpu_fiji_smumgr.c | 909 uint32_t vco_freq = clock * dividers.uc_pll_post_div; local in function:fiji_calculate_sclk_params 911 vco_freq, &ssInfo)) {
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/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
amdgpu_si_dpm.c | 5292 u32 vco_freq = engine_clock * dividers.post_div; local in function:si_calculate_sclk_params 5295 ASIC_INTERNAL_ENGINE_SS, vco_freq)) {
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/src/sys/external/bsd/drm2/dist/drm/i915/display/ |
intel_display.c | 197 int hpll_freq, vco_freq[] = { 800, 1600, 2000, 2400 }; local in function:vlv_get_hpll_vco 203 return vco_freq[hpll_freq] * 1000;
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