| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_dpp_dscl.c | 473 bool dpp1_dscl_is_lb_conf_valid(int ceil_vratio, int num_partitions, int vtaps)
476 return vtaps <= (num_partitions - ceil_vratio + 2);
478 return vtaps <= num_partitions;
486 int vtaps = scl_data->taps.v_taps; local in function:dpp1_dscl_find_lb_memory_config
498 if (dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps)
505 if (dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps)
514 if (dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps)
522 /*Ensure we can support the requested number of vtaps*/
523 ASSERT(dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps)
731 /* HTaps/VTaps */
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_dce_v10_0.c | 713 u32 vtaps; /* vertical scaler taps */ member in struct:dce10_wm_params
916 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) ||
917 (wm->vtaps >= 5) ||
1006 if (lb_partitions <= (wm->vtaps + 1))
1068 wm_high.vtaps = 1;
1070 wm_high.vtaps = 2;
1107 wm_low.vtaps = 1;
1109 wm_low.vtaps = 2;
|
| amdgpu_dce_v11_0.c | 739 u32 vtaps; /* vertical scaler taps */ member in struct:dce10_wm_params
942 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) ||
943 (wm->vtaps >= 5) ||
1032 if (lb_partitions <= (wm->vtaps + 1))
1094 wm_high.vtaps = 1;
1096 wm_high.vtaps = 2;
1133 wm_low.vtaps = 1;
1135 wm_low.vtaps = 2;
|
| amdgpu_dce_v6_0.c | 511 u32 vtaps; /* vertical scaler taps */ member in struct:dce6_wm_params
714 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) ||
715 (wm->vtaps >= 5) ||
804 if (lb_partitions <= (wm->vtaps + 1))
875 wm_high.vtaps = 1;
877 wm_high.vtaps = 2;
902 wm_low.vtaps = 1;
904 wm_low.vtaps = 2;
|
| amdgpu_dce_v8_0.c | 648 u32 vtaps; /* vertical scaler taps */ member in struct:dce8_wm_params
851 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) ||
852 (wm->vtaps >= 5) ||
941 if (lb_partitions <= (wm->vtaps + 1))
1003 wm_high.vtaps = 1;
1005 wm_high.vtaps = 2;
1042 wm_low.vtaps = 1;
1044 wm_low.vtaps = 2;
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_evergreen.c | 1949 u32 vtaps; /* vertical scaler taps */ member in struct:evergreen_wm_params
2086 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) ||
2087 (wm->vtaps >= 5) ||
2143 if (lb_partitions <= (wm->vtaps + 1))
2203 wm_high.vtaps = 1;
2205 wm_high.vtaps = 2;
2230 wm_low.vtaps = 1;
2232 wm_low.vtaps = 2;
|
| radeon_si.c | 2077 u32 vtaps; /* vertical scaler taps */ member in struct:dce6_wm_params
2232 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) ||
2233 (wm->vtaps >= 5) ||
2291 if (lb_partitions <= (wm->vtaps + 1))
2354 wm_high.vtaps = 1;
2356 wm_high.vtaps = 2;
2381 wm_low.vtaps = 1;
2383 wm_low.vtaps = 2;
|
| radeon_cik.c | 8994 u32 vtaps; /* vertical scaler taps */ member in struct:dce8_wm_params
9197 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) ||
9198 (wm->vtaps >= 5) ||
9287 if (lb_partitions <= (wm->vtaps + 1))
9350 wm_high.vtaps = 1;
9352 wm_high.vtaps = 2;
9390 wm_low.vtaps = 1;
9392 wm_low.vtaps = 2;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| display_mode_structs.h | 307 unsigned int vtaps; member in struct:_vcs_dpi_scaler_taps_st
|
| display_mode_vba.h | 286 unsigned int vtaps[DC__NUM_DPP__MAX]; member in struct:vba_vars_st
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| dcn_calcs.h | 205 float vtaps[number_of_planes_minus_one + 1]; member in struct:dcn_bw_internal_vars
|
