| /xsrc/external/mit/libdrm/dist/radeon/ |
| radeon_cs.h | 44 uint32_t write_domain; member in struct:radeon_cs_reloc
86 uint32_t write_domain,
99 uint32_t write_domain);
113 uint32_t write_domain);
|
| radeon_cs_space.c | 44 uint32_t read_domains, write_domain; local
50 write_domain = sc->write_domain;
54 bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain;
59 if (write_domain && (write_domain == bo->space_accounted)) {
69 if (write_domain) {
70 if (write_domain == RADEON_GEM_DOMAIN_VRAM)
72 else if (write_domain == RADEON_GEM_DOMAIN_GTT)
74 sc->new_accounted = write_domain;
[all...] |
| radeon_cs_gem.c | 65 uint32_t write_domain; member in struct:cs_reloc_gem
175 uint32_t write_domain,
187 if ((read_domain && write_domain) || (!read_domain && !write_domain)) {
196 if (write_domain == RADEON_GEM_DOMAIN_CPU) {
217 if (write_domain && (reloc->read_domain & write_domain)) {
219 reloc->write_domain = write_domain;
220 } else if (read_domain & reloc->write_domain) {
[all...] |
| radeon_cs_int.h | 8 uint32_t write_domain; member in struct:radeon_cs_space_check
41 uint32_t write_domain,
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/winsys/i915/drm/ |
| i915_drm_batchbuffer.c | 101 unsigned write_domain = 0; local
108 write_domain = 0;
112 write_domain = I915_GEM_DOMAIN_RENDER;
116 write_domain = I915_GEM_DOMAIN_RENDER;
120 write_domain = 0;
124 write_domain = 0;
138 write_domain);
143 write_domain);
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/i915/drm/ |
| i915_drm_batchbuffer.c | 101 unsigned write_domain = 0; local
108 write_domain = 0;
112 write_domain = I915_GEM_DOMAIN_RENDER;
116 write_domain = I915_GEM_DOMAIN_RENDER;
120 write_domain = 0;
124 write_domain = 0;
138 write_domain);
143 write_domain);
|
| /xsrc/external/mit/libdrm/dist/intel/ |
| intel_bufmgr_fake.c | 85 uint32_t write_domain; member in struct:fake_buffer_reloc
202 uint32_t write_domain; member in struct:_drm_intel_bo_fake
1252 uint32_t read_domains, uint32_t write_domain)
1287 r->write_domain = write_domain;
1324 target_fake->write_domain |= r->write_domain;
1372 if (bo_fake->write_domain != 0) {
1409 bo_fake->write_domain = 0;
|
| /xsrc/external/mit/xf86-video-intel/dist/src/uxa/ |
| i965_render.c | 1315 uint32_t write_domain, read_domains; local
1319 write_domain = I915_GEM_DOMAIN_RENDER;
1322 write_domain = 0;
1326 read_domains, write_domain);
1348 read_domains, write_domain,
1367 uint32_t write_domain, read_domains; local
1371 write_domain = I915_GEM_DOMAIN_RENDER;
1374 write_domain = 0;
1378 read_domains, write_domain);
1405 read_domains, write_domain,
[all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/ |
| i965_render.c | 1315 uint32_t write_domain, read_domains; local
1319 write_domain = I915_GEM_DOMAIN_RENDER;
1322 write_domain = 0;
1326 read_domains, write_domain);
1348 read_domains, write_domain,
1367 uint32_t write_domain, read_domains; local
1371 write_domain = I915_GEM_DOMAIN_RENDER;
1374 write_domain = 0;
1378 read_domains, write_domain);
1405 read_domains, write_domain,
[all...] |
| /xsrc/external/mit/xf86-video-intel-old/dist/src/ |
| i965_render.c | 1090 uint32_t write_domain, read_domains; local
1093 write_domain = I915_GEM_DOMAIN_RENDER;
1096 write_domain = 0;
1099 dri_bo_emit_reloc(ss_bo, read_domains, write_domain,
|
| /xsrc/external/mit/MesaLib.old/dist/include/drm-uapi/ |
| i915_drm.h | 742 __u32 write_domain; member in struct:drm_i915_gem_set_domain
792 __u32 write_domain; member in struct:drm_i915_gem_relocation_entry
|
| /xsrc/external/mit/xf86-video-ati/dist/src/ |
| radeon_drm.h | 844 uint32_t write_domain; member in struct:drm_radeon_gem_set_domain
895 uint32_t write_domain; member in struct:drm_radeon_cs_reloc
|
| /xsrc/external/mit/MesaLib/dist/include/drm-uapi/ |
| i915_drm.h | 931 * Supported values for @read_domains and @write_domain:
966 * @write_domain: New write domain.
971 __u32 write_domain; member in struct:drm_i915_gem_set_domain
1021 __u32 write_domain; member in struct:drm_i915_gem_relocation_entry
|
| /xsrc/external/mit/libdrm/dist/include/drm/ |
| i915_drm.h | 1007 * Supported values for @read_domains and @write_domain:
1042 * @write_domain: New write domain.
1047 __u32 write_domain; member in struct:drm_i915_gem_set_domain
1097 __u32 write_domain; member in struct:drm_i915_gem_relocation_entry
|
| radeon_drm.h | 880 __u32 write_domain; member in struct:drm_radeon_gem_set_domain
980 __u32 write_domain; member in struct:drm_radeon_cs_reloc
|
