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    Searched refs:ADDR_SURF_BANK_WIDTH_2 (Results 1 - 25 of 32) sorted by relevancy

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  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v8_0.c 2228 mod2array[2] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
2256 mod2array[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
2260 mod2array[11] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
2826 mod2array[8] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
2831 mod2array[9] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
3211 mod2array[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
3215 mod2array[11] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
3388 mod2array[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
3392 mod2array[11] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
amdgpu_gfx_v7_0.c 1194 macrotile[8] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
1198 macrotile[9] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
1555 macrotile[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
1559 macrotile[11] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
amdgpu_gfx_v6_0.c 816 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
999 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
1007 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
sid.h 1208 # define ADDR_SURF_BANK_WIDTH_2 1
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
bif_5_1_enum.h 961 ADDR_SURF_BANK_WIDTH_2 = 0x1,
bif_5_0_enum.h 1091 ADDR_SURF_BANK_WIDTH_2 = 0x1,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
gmc_8_2_enum.h 961 ADDR_SURF_BANK_WIDTH_2 = 0x1,
gmc_8_1_enum.h 1091 ADDR_SURF_BANK_WIDTH_2 = 0x1,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_8_0_enum.h 961 ADDR_SURF_BANK_WIDTH_2 = 0x1,
smu_7_1_0_enum.h 1120 ADDR_SURF_BANK_WIDTH_2 = 0x1,
smu_7_1_1_enum.h 1121 ADDR_SURF_BANK_WIDTH_2 = 0x1,
smu_7_1_2_enum.h 1139 ADDR_SURF_BANK_WIDTH_2 = 0x1,
smu_7_1_3_enum.h 1175 ADDR_SURF_BANK_WIDTH_2 = 0x1,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_6_0_enum.h 974 ADDR_SURF_BANK_WIDTH_2 = 0x1,
uvd_5_0_enum.h 1104 ADDR_SURF_BANK_WIDTH_2 = 0x1,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_8_0_enum.h 1046 ADDR_SURF_BANK_WIDTH_2 = 0x1,
dce_10_0_enum.h 1666 ADDR_SURF_BANK_WIDTH_2 = 0x1,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_4_enum.h 1256 ADDR_SURF_BANK_WIDTH_2 = 0x1,
oss_3_0_1_enum.h 1357 ADDR_SURF_BANK_WIDTH_2 = 0x1,
oss_3_0_enum.h 1390 ADDR_SURF_BANK_WIDTH_2 = 0x1,
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_cik.c 2858 macrotile[8] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
2862 macrotile[9] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
2973 macrotile[0] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
2977 macrotile[1] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
3009 macrotile[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
3013 macrotile[11] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
cikd.h 1264 # define ADDR_SURF_BANK_WIDTH_2 1
sid.h 1210 # define ADDR_SURF_BANK_WIDTH_2 1
evergreend.h 2221 # define ADDR_SURF_BANK_WIDTH_2 1
radeon_si.c 2694 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |
2909 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) |

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