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    Searched refs:AFMT_AUDIO_PACKET_CONTROL (Results 1 - 14 of 14) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_evergreen_hdmi.c 389 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + offset,
424 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,
430 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,
434 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,
463 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,
489 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,
radeon_dce3_1_afmt.c 216 WREG32(AFMT_AUDIO_PACKET_CONTROL + offset,
radeon_r600.c 3681 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0) & ~HDMI0_AZ_FORMAT_WTRIG_MASK;
3682 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp);
3683 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1) & ~HDMI0_AZ_FORMAT_WTRIG_MASK;
3684 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, tmp);
3827 hdmi0 = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
3828 hdmi1 = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
3923 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, hdmi0);
3924 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, hdmi1);
4035 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0);
4037 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp)
    [all...]
rv770d.h 853 #define AFMT_AUDIO_PACKET_CONTROL 0x7604
evergreend.h 711 #define AFMT_AUDIO_PACKET_CONTROL 0x712c
r600d.h 1233 #define AFMT_AUDIO_PACKET_CONTROL 0x7604
radeon_evergreen.c 4605 rdev, AFMT_AUDIO_PACKET_CONTROL + crtc_offsets[i],
4661 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + crtc_offsets[i],
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h 63 SRI(AFMT_AUDIO_PACKET_CONTROL, DIG, id), \
177 SE_SF(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, mask_sh),\
204 SE_SF(AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, mask_sh),\
653 uint32_t AFMT_AUDIO_PACKET_CONTROL;
amdgpu_dce_stream_encoder.c 1380 /* AFMT_AUDIO_PACKET_CONTROL */
1381 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1);
1466 /* AFMT_AUDIO_PACKET_CONTROL */
1467 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1);
1549 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, !mute);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_stream_encoder.c 1312 /* AFMT_AUDIO_PACKET_CONTROL */
1313 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1);
1402 /* AFMT_AUDIO_PACKET_CONTROL */
1403 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1);
1486 REG_UPDATE(AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, !mute);
dcn10_stream_encoder.h 50 SRI(AFMT_AUDIO_PACKET_CONTROL, DIG, id), \
119 uint32_t AFMT_AUDIO_PACKET_CONTROL;
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v6_0.c 1566 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_RESET_FIFO_WHEN_AUDIO_DIS, 1);
1567 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1);
1605 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 1);
1616 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 0);
1631 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 1);
amdgpu_dce_v10_0.c 1673 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1);
1742 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 1);
amdgpu_dce_v11_0.c 1715 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, 1);
1784 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, 1);

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