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    Searched refs:AFMT_AUDIO_SRC_CONTROL (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_dce6_afmt.c 124 WREG32(AFMT_AUDIO_SRC_CONTROL + dig->afmt->offset,
sid.h 925 #define AFMT_AUDIO_SRC_CONTROL 0x713c
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h 65 SRI(AFMT_AUDIO_SRC_CONTROL, DIG, id), \
173 SE_SF(AFMT_AUDIO_SRC_CONTROL, AFMT_AUDIO_SRC_SELECT, mask_sh),\
655 uint32_t AFMT_AUDIO_SRC_CONTROL;
amdgpu_dce_stream_encoder.c 1356 REG_SET(AFMT_AUDIO_SRC_CONTROL, 0, AFMT_AUDIO_SRC_SELECT, az_inst);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_stream_encoder.h 52 SRI(AFMT_AUDIO_SRC_CONTROL, DIG, id), \
121 uint32_t AFMT_AUDIO_SRC_CONTROL;
amdgpu_dcn10_stream_encoder.c 1294 REG_SET(AFMT_AUDIO_SRC_CONTROL, 0, AFMT_AUDIO_SRC_SELECT, az_inst);
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h 924 #define AFMT_AUDIO_SRC_CONTROL 0x1c4f
amdgpu_dce_v10_0.c 1226 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_SRC_CONTROL, AFMT_AUDIO_SRC_SELECT, dig->afmt->pin->id);
amdgpu_dce_v11_0.c 1252 tmp = REG_SET_FIELD(tmp, AFMT_AUDIO_SRC_CONTROL, AFMT_AUDIO_SRC_SELECT, dig->afmt->pin->id);
amdgpu_dce_v6_0.c 1130 REG_SET_FIELD(0, AFMT_AUDIO_SRC_CONTROL, AFMT_AUDIO_SRC_SELECT,

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