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    Searched refs:AR_PHY_GAIN_2GHZ (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/external/isc/atheros_hal/dist/ar5416/
ar9285_reset.c 273 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN,
275 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, AR_PHY_GAIN_2GHZ_XATTEN1_DB,
277 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN,
279 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, AR_PHY_GAIN_2GHZ_XATTEN2_DB,
283 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
285 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
287 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
289 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
ar5416_reset.c 1307 OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
1308 (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) & ~AR_PHY_GAIN_2GHZ_RXTX_MARGIN) |
1351 OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x1000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x1000) & ~AR_PHY_GAIN_2GHZ_BSW_MARGIN) |
1353 OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x1000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x1000) & ~AR_PHY_GAIN_2GHZ_BSW_ATTEN) |
1355 OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x2000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x2000) & ~AR_PHY_GAIN_2GHZ_BSW_MARGIN) |
1357 OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + 0x2000, (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + 0x2000) & ~AR_PHY_GAIN_2GHZ_BSW_ATTEN)
    [all...]
  /src/sys/external/isc/atheros_hal/dist/ar5212/
ar5212phy.h 306 #define AR_PHY_GAIN_2GHZ 0xA20C
ar5212_reset.c 1595 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
  /src/sys/dev/ic/
arn5416.c 258 reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);
263 AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);
273 reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);
276 AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);
arn9285.c 200 reg = AR_READ(sc, AR_PHY_GAIN_2GHZ);
209 AR_WRITE(sc, AR_PHY_GAIN_2GHZ, reg);
212 reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);
221 AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);
arn9280.c 264 reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);
273 AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);
arn9287.c 182 reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset);
187 AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg);
arn5008reg.h 146 #define AR_PHY_GAIN_2GHZ 0xa20c
540 /* Bits for AR_PHY_GAIN_2GHZ. */
  /src/sys/dev/usb/
if_otusreg.h 222 #define AR_PHY_GAIN_2GHZ (AR_PHY_BASE + 0x0a0c)
if_otus.c 2645 tmp = otus_phy_get_def(sc, AR_PHY_GAIN_2GHZ);
2652 otus_write(sc, AR_PHY_GAIN_2GHZ, tmp);
2654 tmp = otus_phy_get_def(sc, AR_PHY_GAIN_2GHZ + offset);
2657 otus_write(sc, AR_PHY_GAIN_2GHZ + offset, tmp);

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