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    Searched refs:AVIVO_D1CUR_CONTROL (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_cursor.c 77 WREG32_IDX(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset,
124 WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset);
r500_reg.h 427 #define AVIVO_D1CUR_CONTROL 0x6400
  /src/sys/dev/pci/
radeonfb.c 4205 gencntl = AVIVO_D1CUR_CONTROL;
radeonfbreg.h 3780 #define AVIVO_D1CUR_CONTROL 0x6400

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