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  /src/external/gpl3/gdb/dist/sim/ppc/
registers.h 69 cr_i_negative = BIT4(0),
70 cr_i_positive = BIT4(1),
71 cr_i_zero = BIT4(2),
72 cr_i_summary_overflow = BIT4(3),
97 cr_fp_exception = BIT4(0),
98 cr_fp_enabled_exception = BIT4(1),
99 cr_fp_invalid_exception = BIT4(2),
100 cr_fp_overflow_exception = BIT4(3),
bits.h 95 #define BIT4(POS) (1 << _MAKE_SHIFT(4, POS))
  /src/external/gpl3/gdb.old/dist/sim/ppc/
registers.h 69 cr_i_negative = BIT4(0),
70 cr_i_positive = BIT4(1),
71 cr_i_zero = BIT4(2),
72 cr_i_summary_overflow = BIT4(3),
97 cr_fp_exception = BIT4(0),
98 cr_fp_enabled_exception = BIT4(1),
99 cr_fp_invalid_exception = BIT4(2),
100 cr_fp_overflow_exception = BIT4(3),
bits.h 95 #define BIT4(POS) (1 << _MAKE_SHIFT(4, POS))
  /src/external/bsd/zstd/dist/lib/common/
zstd_internal.h 74 #define BIT4 16
  /src/sys/dev/pci/
unichromefb.c 702 uni_wr_mask(sc, VIACR, CR36, 0, BIT5+BIT4);
708 uni_wr_mask(sc, VIACR, CR36, BIT5+BIT4, BIT5+BIT4);
787 uni_wr_mask(sc, VIACR, CR11, 0x00, BIT4+BIT5+BIT6);
958 uni_wr_mask(sc, VIACR, CR07, 0x10, BIT4);
960 uni_wr_mask(sc, VIACR, CR35, 0x10, BIT4);
unichromereg.h 56 #define BIT4 0x10
  /src/external/gpl3/gdb.old/dist/sim/common/
sim-bits.h 251 #define BIT4(POS) (1 << _LSB_SHIFT (4, (POS)))
  /src/external/gpl3/gdb/dist/sim/common/
sim-bits.h 251 #define BIT4(POS) (1 << _LSB_SHIFT (4, (POS)))
  /src/external/bsd/zstd/dist/lib/legacy/
zstd_v01.c 1278 #define BIT4 16
zstd_v03.c 2283 #define BIT4 16
zstd_v04.c 302 #define BIT4 16
zstd_v02.c 2643 #define BIT4 16
zstd_v06.c 412 #define BIT4 16
zstd_v07.c 2650 #define BIT4 16
  /src/sys/external/bsd/acpica/dist/tests/misc/
grammar.asl 5129 BIT4, 1, // single bit field entry
5220 Store (1, BIT4)
5222 If (LNotEqual (BIT4, 1))
6694 BIT4, 1, // single-bit field
6752 // be set. BIT4, BIT6. BIT5 and BIT7 should be clear.
6753 If (LNot (BIT4))

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