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    Searched refs:CAIL_PCIE_LINK_WIDTH_SUPPORT_X1 (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/
amd_pcie.h 52 #define CAIL_PCIE_LINK_WIDTH_SUPPORT_X1 0x00010000
62 #define AMDGPU_DEFAULT_PCIE_MLW_MASK (CAIL_PCIE_LINK_WIDTH_SUPPORT_X1 \
amd_pcie_helpers.h 89 case CAIL_PCIE_LINK_WIDTH_SUPPORT_X1:
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_device.c 4531 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);
4539 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);
4546 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);
4552 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);
4557 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);
4561 CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);
4564 adev->pm.pcie_mlw_mask = CAIL_PCIE_LINK_WIDTH_SUPPORT_X1;
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
amdgpu_smu_v11_0.c 1862 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1)
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_vega20_hwmgr.c 868 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1)

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