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Searched refs:CEC_HW_CONTROL_REG (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/nvidia/
tegra_cec.c	`195 CEC_WRITE(sc, CEC_HW_CONTROL_REG, 0); 289 val = CEC_READ(sc, CEC_HW_CONTROL_REG); 290 CEC_WRITE(sc, CEC_HW_CONTROL_REG, 0); 292 CEC_WRITE(sc, CEC_HW_CONTROL_REG, val); 304 CEC_WRITE(sc, CEC_HW_CONTROL_REG, CEC_HW_CONTROL_TX_RX_MODE); 316 CEC_WRITE(sc, CEC_HW_CONTROL_REG, 0); 350 val = CEC_READ(sc, CEC_HW_CONTROL_REG); 356 CEC_SET_CLEAR(sc, CEC_HW_CONTROL_REG,`
tegra_cecreg.h	`37 #define CEC_HW_CONTROL_REG 0x04`

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