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Searched
refs:CG_DISPLAY_GAP_CNTL
(Results
1 - 13
of
13
) sorted by relevancy
/src/sys/external/bsd/drm2/dist/drm/radeon/
rv6xxd.h
132
#define
CG_DISPLAY_GAP_CNTL
0x7dc
radeon_cypress_dpm.c
1736
u32 tmp = RREG32(
CG_DISPLAY_GAP_CNTL
);
1745
WREG32(
CG_DISPLAY_GAP_CNTL
, tmp);
1753
tmp = RREG32(
CG_DISPLAY_GAP_CNTL
) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK);
1764
WREG32(
CG_DISPLAY_GAP_CNTL
, tmp);
radeon_rv770_dpm.c
884
u32 tmp = RREG32(
CG_DISPLAY_GAP_CNTL
);
889
WREG32(
CG_DISPLAY_GAP_CNTL
, tmp);
1348
u32 tmp = RREG32(
CG_DISPLAY_GAP_CNTL
);
1361
WREG32(
CG_DISPLAY_GAP_CNTL
, tmp);
radeon_rv6xx_dpm.c
994
WREG32(
CG_DISPLAY_GAP_CNTL
, tmp);
1187
u32 tmp = RREG32(
CG_DISPLAY_GAP_CNTL
);
1200
WREG32(
CG_DISPLAY_GAP_CNTL
, tmp);
rv770d.h
257
#define
CG_DISPLAY_GAP_CNTL
0x714
cikd.h
131
#define
CG_DISPLAY_GAP_CNTL
0xC0200060
sid.h
303
#define
CG_DISPLAY_GAP_CNTL
0x828
radeon_ci_dpm.c
1993
u32 tmp = RREG32_SMC(
CG_DISPLAY_GAP_CNTL
);
2005
WREG32_SMC(
CG_DISPLAY_GAP_CNTL
, tmp);
2054
u32 tmp = RREG32_SMC(
CG_DISPLAY_GAP_CNTL
);
2060
WREG32_SMC(
CG_DISPLAY_GAP_CNTL
, tmp);
evergreend.h
195
#define
CG_DISPLAY_GAP_CNTL
0x714
radeon_si_dpm.c
3690
tmp = RREG32(
CG_DISPLAY_GAP_CNTL
) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK);
3701
WREG32(
CG_DISPLAY_GAP_CNTL
, tmp);
3804
u32 tmp = RREG32(
CG_DISPLAY_GAP_CNTL
);
3813
WREG32(
CG_DISPLAY_GAP_CNTL
, tmp);
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_smu7_hwmgr.c
400
display_gap = PHM_SET_FIELD(display_gap,
CG_DISPLAY_GAP_CNTL
,
403
display_gap = PHM_SET_FIELD(display_gap,
CG_DISPLAY_GAP_CNTL
,
4084
display_gap = PHM_SET_FIELD(display_gap,
CG_DISPLAY_GAP_CNTL
, DISP_GAP, (hwmgr->display_config->num_display > 0) ? DISPLAY_GAP_VBLANK_OR_WM : DISPLAY_GAP_IGNORE);
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_si_dpm.c
4157
tmp = RREG32(
CG_DISPLAY_GAP_CNTL
) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK);
4168
WREG32(
CG_DISPLAY_GAP_CNTL
, tmp);
4271
u32 tmp = RREG32(
CG_DISPLAY_GAP_CNTL
);
4280
WREG32(
CG_DISPLAY_GAP_CNTL
, tmp);
sid.h
305
#define
CG_DISPLAY_GAP_CNTL
0x20a
Completed in 53 milliseconds
Indexes created Sat Oct 25 10:09:55 GMT 2025