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    Searched refs:CLK_MM_DISP_SPLIT0 (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
mt8173-clk.h 277 #define CLK_MM_DISP_SPLIT0 28
mt2712-clk.h 331 #define CLK_MM_DISP_SPLIT0 28
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
mt8173.dtsi 1198 clocks = <&mmsys CLK_MM_DISP_SPLIT0>;

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