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Searched refs:CLK_PERI_UART0 (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
mt8135-clk.h	`150 #define CLK_PERI_UART0 10`
mt8173-clk.h	`215 #define CLK_PERI_UART0 20`
mt2701-clk.h	`243 #define CLK_PERI_UART0 20`
mt2712-clk.h	`257 #define CLK_PERI_UART0 16`
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
mt8135.dtsi	`227 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;`
mt2701.dtsi	`260 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;`
mt7623.dtsi	`382 <&pericfg CLK_PERI_UART0>;`
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
mt8173.dtsi	`680 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;`

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