Searched refs:CLK_TOP_NET1PLL_D5_D2 (Results 1 - 3 of 3) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmt7986-clk.h43 #define CLK_TOP_NET1PLL_D5_D2 18 macro
H A Dmediatek,mt7988-clk.h47 #define CLK_TOP_NET1PLL_D5_D2 17 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi384 <&topckgen CLK_TOP_NET1PLL_D5_D2>;

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