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    Searched refs:CLK_TOP_SPISLV_SEL (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
mt2712-clk.h 190 #define CLK_TOP_SPISLV_SEL 157
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
mt2712e.dtsi 321 assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>;

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