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    Searched refs:CMD_PHASE (Results 1 - 16 of 16) sorted by relevancy

  /src/sys/arch/amiga/dev/
scivar.h 94 #define CMD_PHASE 0x02
sci.c 520 phase = CMD_PHASE;
533 case CMD_PHASE:
623 phase = CMD_PHASE;
635 case CMD_PHASE:
sbicvar.h 169 #define CMD_PHASE 0x02
sbic.c 1043 && csr != (SBIC_CSR_MIS_2|CMD_PHASE) && csr != SBIC_CSR_SEL_TIMEO);
1051 if (csr == (SBIC_CSR_MIS_2|CMD_PHASE)) {
1164 case CMD_PHASE:
1407 case SBIC_CSR_XFERRED|CMD_PHASE:
1408 case SBIC_CSR_MIS|CMD_PHASE:
1409 case SBIC_CSR_MIS_1|CMD_PHASE:
1410 case SBIC_CSR_MIS_2|CMD_PHASE:
1411 if (sbicxfstart(regs, clen, CMD_PHASE, sbic_cmd_wait))
1413 cbuf, CMD_PHASE))
2214 case SBIC_CSR_XFERRED|CMD_PHASE
    [all...]
  /src/sys/arch/mvme68k/dev/
sbicvar.h 156 #define CMD_PHASE 0x02
sbic.c 1028 csr != (SBIC_CSR_MIS_2 | CMD_PHASE) &&
1379 case SBIC_CSR_XFERRED | CMD_PHASE:
1380 case SBIC_CSR_MIS | CMD_PHASE:
1381 case SBIC_CSR_MIS_1 | CMD_PHASE:
1382 case SBIC_CSR_MIS_2 | CMD_PHASE:
2108 case SBIC_CSR_XFERRED | CMD_PHASE:
2109 case SBIC_CSR_MIS | CMD_PHASE:
2110 case SBIC_CSR_MIS_1 | CMD_PHASE:
2111 case SBIC_CSR_MIS_2 | CMD_PHASE:
  /src/sys/arch/sgimips/stand/common/
iris_scsi.c 275 csr != (SBIC_CSR_MIS_2 | CMD_PHASE) &&
368 case SBIC_CSR_XFERRED | CMD_PHASE:
369 case SBIC_CSR_MIS | CMD_PHASE:
370 case SBIC_CSR_MIS_1 | CMD_PHASE:
371 case SBIC_CSR_MIS_2 | CMD_PHASE:
iris_scsireg.h 378 #define CMD_PHASE 0x02
  /src/sys/arch/acorn32/podulebus/
sbicvar.h 159 #define CMD_PHASE 0x02
sbic.c 979 csr != (SBIC_CSR_MIS_2 | CMD_PHASE) &&
988 if (csr == (SBIC_CSR_MIS_2 | CMD_PHASE)) {
1097 case CMD_PHASE:
1342 case SBIC_CSR_XFERRED | CMD_PHASE:
1343 case SBIC_CSR_MIS | CMD_PHASE:
1344 case SBIC_CSR_MIS_1 | CMD_PHASE:
1345 case SBIC_CSR_MIS_2 | CMD_PHASE:
1346 if (sbicxfstart(regs, clen, CMD_PHASE, sbic_cmd_wait))
1348 cbuf, CMD_PHASE))
2040 case SBIC_CSR_XFERRED | CMD_PHASE
    [all...]
  /src/sys/arch/hp300/stand/common/
scsi.c 284 phase = CMD_PHASE;
289 case CMD_PHASE:
scsireg.h 147 #define CMD_PHASE 0x02
  /src/sys/arch/luna68k/stand/boot/
scsireg.h 123 #define CMD_PHASE 0x02
sc.c 760 } else if (hs->sc_phase == CMD_PHASE) {
  /src/sys/dev/ic/
wd33c93.c 1051 csr != (SBIC_CSR_MIS_2 | CMD_PHASE) &&
1898 case SBIC_CSR_XFERRED | CMD_PHASE:
1899 case SBIC_CSR_MIS | CMD_PHASE:
1900 case SBIC_CSR_MIS_1 | CMD_PHASE:
1901 case SBIC_CSR_MIS_2 | CMD_PHASE:
2349 case CMD_PHASE:
2350 printf("CMD_PHASE\n");
wd33c93reg.h 353 #define CMD_PHASE 0x02

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