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    Searched refs:CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK (Results 1 - 15 of 15) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_amdkfd_gfx_v10.c 205 CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK |
amdgpu_amdkfd_gfx_v7.c 211 WREG32(mmCPC_INT_CNTL, CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK |
amdgpu_amdkfd_gfx_v8.c 169 WREG32(mmCPC_INT_CNTL, CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK |
amdgpu_amdkfd_gfx_v9.c 215 CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK |
amdgpu_gfx_v7_0.c 4719 cp_int_cntl &= ~CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK;
4724 cp_int_cntl |= CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK;
4770 mec_int_cntl &= ~CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK;
4775 mec_int_cntl |= CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK;
amdgpu_gfx_v6_0.c 3248 cp_int_cntl &= ~CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK;
3253 cp_int_cntl |= CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK;
amdgpu_gfx_v8_0.c 6555 mec_int_cntl &= ~CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK;
6560 mec_int_cntl |= CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK;
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_sh_mask.h 2384 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK 0x04000000L
gfx_7_2_sh_mask.h 1187 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK 0x4000000
gfx_8_0_sh_mask.h 1515 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK 0x4000000
    [all...]
gfx_8_1_sh_mask.h 2039 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK 0x4000000
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_sh_mask.h     [all...]
gc_9_1_sh_mask.h     [all...]
gc_9_2_1_sh_mask.h     [all...]
gc_10_1_0_sh_mask.h     [all...]

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