| /src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| se_brtarget_stall.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200 130 WR_MMR(DCPLB_DATA0, 0x0003109d, p0, r0); // Page Size = 4MB
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| se_stall_if2.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200 130 WR_MMR(DCPLB_DATA0, 0x00031005, p0, r0); // Page Size = 4MB
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| lmu_excpt_prot0.S | 49 LD32(p0, DCPLB_DATA0); 96 WR_MMR(DCPLB_DATA0, PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_L1_CACHABLE|CPLB_USER_RW, p0, r0); 147 LD32(p2, DCPLB_DATA0);
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| lmu_excpt_prot1.S | 51 LD32(p0, DCPLB_DATA0); 98 WR_MMR(DCPLB_DATA0, PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_L1_CACHABLE, p0, r0); 152 LD32(p2, DCPLB_DATA0);
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| se_popkill.S | 46 #ifndef DCPLB_DATA0 47 #define DCPLB_DATA0 0xFFE00200 132 WR_MMR(DCPLB_DATA0, DATA_ADDR_1, p0, r0); 133 //WR_MMR(DCPLB_DATA0, 0x00031005, p0, r0); // Page Size = 4MB
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| lmu_cplb_multiple0.S | 49 LD32(p0, DCPLB_DATA0); 158 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 171 WR_MMR(DCPLB_DATA0, 0, p0, r0); 182 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 195 WR_MMR(DCPLB_DATA0, 0, p0, r0); 206 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 219 WR_MMR(DCPLB_DATA0, 0, p0, r0); 230 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 243 WR_MMR(DCPLB_DATA0, 0, p0, r0); 254 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0) [all...] |
| se_event_quad.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200
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| se_loop_kill.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200
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| se_loop_kill_01.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200
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| se_oneins_zoff.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200
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| lmu_cplb_multiple1.S | 49 LD32(p0, DCPLB_DATA0); 160 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 173 WR_MMR(DCPLB_DATA0, 0, p0, r0); 184 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 197 WR_MMR(DCPLB_DATA0, 0, p0, r0); 208 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 221 WR_MMR(DCPLB_DATA0, 0, p0, r0); 232 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 245 WR_MMR(DCPLB_DATA0, 0, p0, r0); 256 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0) [all...] |
| se_loop_mv2lb_stall.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200
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| se_loop_mv2lc_stall.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200
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| se_loop_mv2lt_stall.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200
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| /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/ |
| se_brtarget_stall.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200 130 WR_MMR(DCPLB_DATA0, 0x0003109d, p0, r0); // Page Size = 4MB
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| se_stall_if2.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200 130 WR_MMR(DCPLB_DATA0, 0x00031005, p0, r0); // Page Size = 4MB
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| lmu_excpt_prot0.S | 49 LD32(p0, DCPLB_DATA0); 96 WR_MMR(DCPLB_DATA0, PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_L1_CACHABLE|CPLB_USER_RW, p0, r0); 147 LD32(p2, DCPLB_DATA0);
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| lmu_excpt_prot1.S | 51 LD32(p0, DCPLB_DATA0); 98 WR_MMR(DCPLB_DATA0, PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_L1_CACHABLE, p0, r0); 152 LD32(p2, DCPLB_DATA0);
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| se_popkill.S | 46 #ifndef DCPLB_DATA0 47 #define DCPLB_DATA0 0xFFE00200 132 WR_MMR(DCPLB_DATA0, DATA_ADDR_1, p0, r0); 133 //WR_MMR(DCPLB_DATA0, 0x00031005, p0, r0); // Page Size = 4MB
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| lmu_cplb_multiple0.S | 49 LD32(p0, DCPLB_DATA0); 158 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 171 WR_MMR(DCPLB_DATA0, 0, p0, r0); 182 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 195 WR_MMR(DCPLB_DATA0, 0, p0, r0); 206 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 219 WR_MMR(DCPLB_DATA0, 0, p0, r0); 230 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 243 WR_MMR(DCPLB_DATA0, 0, p0, r0); 254 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0) [all...] |
| se_event_quad.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200
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| se_loop_kill.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200
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| se_loop_kill_01.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200
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| se_oneins_zoff.S | 44 #ifndef DCPLB_DATA0 45 #define DCPLB_DATA0 0xFFE00200
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| lmu_cplb_multiple1.S | 49 LD32(p0, DCPLB_DATA0); 160 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 173 WR_MMR(DCPLB_DATA0, 0, p0, r0); 184 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 197 WR_MMR(DCPLB_DATA0, 0, p0, r0); 208 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 221 WR_MMR(DCPLB_DATA0, 0, p0, r0); 232 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0); 245 WR_MMR(DCPLB_DATA0, 0, p0, r0); 256 WR_MMR(DCPLB_DATA0, (PAGE_SIZE_1K|CPLB_VALID|CPLB_DIRTY|CPLB_SUPV_WR|CPLB_USER_RW), p0, r0) [all...] |