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    Searched refs:DC_HPD_CONTROL (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_link_encoder.h 46 SRI(DC_HPD_CONTROL, HPD, id)
115 uint32_t DC_HPD_CONTROL;
amdgpu_dce_link_encoder.c 1378 uint32_t addr = HPD_REG(DC_HPD_CONTROL);
1382 get_reg_field_value(hpd_enable, DC_HPD_CONTROL, DC_HPD_EN);
1385 set_reg_field_value(value, 1, DC_HPD_CONTROL, DC_HPD_EN);
1392 uint32_t addr = HPD_REG(DC_HPD_CONTROL);
1395 set_reg_field_value(value, 0, DC_HPD_CONTROL, DC_HPD_EN);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_link_encoder.h 42 SRI(DC_HPD_CONTROL, HPD, id)
81 uint32_t DC_HPD_CONTROL;
amdgpu_dcn10_link_encoder.c 1361 HPD_REG_UPDATE(DC_HPD_CONTROL,
1369 HPD_REG_UPDATE(DC_HPD_CONTROL,
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 362 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1);
404 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 0);
amdgpu_dce_v11_0.c 380 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1);
421 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 0);

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